/dports/cad/opencascade/opencascade-7.6.0/tests/gdt/import/ |
H A D | A4 | 13 0:1:4:24 Dimension.4.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 22 0:1:4:24 Dimension.5.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 31 0:1:4:24 Dimension.6.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 40 0:1:4:24 Dimension.7.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 49 0:1:4:24 Dimension.8.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 58 0:1:4:24 Dimension.9.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 67 0:1:4:24 Dimension.10.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 76 0:1:4:24 Dimension.11.1 ( N "diameter" T 15, V 6.6500000000000004, VL 0.12, VU 0.12, P 0 ) 294 0:1:4:31 Dimension.100.1 ( N "curve length" T 14, V 25, VL 0.25, VU 0.25, P 0 ) 417 0:1:4:33 Dimension.161.1 ( N "angle" T 11, V 90, VL 1, VU 1, Q 3, P 0 ) [all …]
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/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/insns/ |
H A D | vrgatherei16_vv.h | 2 float vemul = (16.0 / P.VU.vsew * P.VU.vflmul); 4 require_align(insn.rd(), P.VU.vflmul); 5 require_align(insn.rs2(), P.VU.vflmul); 14 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); 15 P.VU.elt<uint8_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, vs1); 19 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); 20 P.VU.elt<uint16_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, vs1); 24 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); 25 P.VU.elt<uint32_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, vs1); 29 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); [all …]
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H A D | vrgather_vv.h | 2 require_align(insn.rd(), P.VU.vflmul); 3 require_align(insn.rs2(), P.VU.vflmul); 4 require_align(insn.rs1(), P.VU.vflmul); 11 auto vs1 = P.VU.elt<uint8_t>(rs1_num, i); 13 P.VU.elt<uint8_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, vs1); 17 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); 18 P.VU.elt<uint16_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, vs1); 22 auto vs1 = P.VU.elt<uint32_t>(rs1_num, i); 23 P.VU.elt<uint32_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, vs1); 27 auto vs1 = P.VU.elt<uint64_t>(rs1_num, i); [all …]
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H A D | vrgather_vi.h | 2 require_align(insn.rd(), P.VU.vflmul); 3 require_align(insn.rs2(), P.VU.vflmul); 11 for (reg_t i = P.VU.vstart->read(); i < vl; ++i) { 16 … P.VU.elt<uint8_t>(rd_num, i, true) = zimm5 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, zimm5); 19 …P.VU.elt<uint16_t>(rd_num, i, true) = zimm5 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, zimm5); 22 …P.VU.elt<uint32_t>(rd_num, i, true) = zimm5 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, zimm5); 25 …P.VU.elt<uint64_t>(rd_num, i, true) = zimm5 >= P.VU.vlmax ? 0 : P.VU.elt<uint64_t>(rs2_num, zimm5);
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H A D | viota_m.h | 2 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); 4 reg_t vl = P.VU.vl->read(); 5 reg_t sew = P.VU.vsew; 9 require(P.VU.vstart->read() == 0); 11 require_align(rd_num, P.VU.vflmul); 12 require_noover(rd_num, P.VU.vflmul, rs2_num, 1); 20 bool do_mask = (P.VU.elt<uint64_t>(0, midx) >> mpos) & 0x1; 32 P.VU.elt<uint8_t>(rd_num, i, true) = use_ori ? 36 P.VU.elt<uint16_t>(rd_num, i, true) = use_ori ? 40 P.VU.elt<uint32_t>(rd_num, i, true) = use_ori ? [all …]
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H A D | vrgather_vx.h | 2 require_align(insn.rd(), P.VU.vflmul); 3 require_align(insn.rs2(), P.VU.vflmul); 12 P.VU.elt<uint8_t>(rd_num, i, true) = rs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, rs1); 15 P.VU.elt<uint16_t>(rd_num, i, true) = rs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, rs1); 18 P.VU.elt<uint32_t>(rd_num, i, true) = rs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, rs1); 21 P.VU.elt<uint64_t>(rd_num, i, true) = rs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint64_t>(rs2_num, rs1);
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H A D | vmvnfr_v.h | 9 const reg_t size = len * P.VU.vlenb; 12 if (vd != vs2 && P.VU.vstart->read() < size) { 13 reg_t i = P.VU.vstart->read() / P.VU.vlenb; 14 reg_t off = P.VU.vstart->read() % P.VU.vlenb; 16 memcpy(&P.VU.elt<uint8_t>(vd + i, off, true), 17 &P.VU.elt<uint8_t>(vs2 + i, off), P.VU.vlenb - off); 22 memcpy(&P.VU.elt<uint8_t>(vd + i, 0, true), 23 &P.VU.elt<uint8_t>(vs2 + i, 0), P.VU.vlenb); 27 P.VU.vstart->write(0);
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H A D | vcompress_vm.h | 2 require(P.VU.vstart->read() == 0); 3 require_align(insn.rd(), P.VU.vflmul); 4 require_align(insn.rs2(), P.VU.vflmul); 6 require_noover(insn.rd(), P.VU.vflmul, insn.rs1(), 1); 14 bool do_mask = (P.VU.elt<uint64_t>(rs1_num, midx) >> mpos) & 0x1; 18 P.VU.elt<uint8_t>(rd_num, pos, true) = P.VU.elt<uint8_t>(rs2_num, i); 21 P.VU.elt<uint16_t>(rd_num, pos, true) = P.VU.elt<uint16_t>(rs2_num, i); 24 P.VU.elt<uint32_t>(rd_num, pos, true) = P.VU.elt<uint32_t>(rs2_num, i); 27 P.VU.elt<uint64_t>(rd_num, pos, true) = P.VU.elt<uint64_t>(rs2_num, i);
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H A D | vfmerge_vfm.h | 5 switch(P.VU.vsew) { 7 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 8 auto &vd = P.VU.elt<float16_t>(rd_num, i, true); 10 auto vs2 = P.VU.elt<float16_t>(rs2_num, i); 20 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 21 auto &vd = P.VU.elt<float32_t>(rd_num, i, true); 23 auto vs2 = P.VU.elt<float32_t>(rs2_num, i); 33 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 34 auto &vd = P.VU.elt<float64_t>(rd_num, i, true); 36 auto vs2 = P.VU.elt<float64_t>(rs2_num, i); [all …]
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H A D | vid_v.h | 2 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); 4 reg_t vl = P.VU.vl->read(); 5 reg_t sew = P.VU.vsew; 9 require_align(rd_num, P.VU.vflmul); 12 for (reg_t i = P.VU.vstart->read() ; i < P.VU.vl->read(); ++i) { 17 P.VU.elt<uint8_t>(rd_num, i, true) = i; 20 P.VU.elt<uint16_t>(rd_num, i, true) = i; 23 P.VU.elt<uint32_t>(rd_num, i, true) = i; 26 P.VU.elt<uint64_t>(rd_num, i, true) = i; 31 P.VU.vstart->write(0);
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H A D | vmulhsu_vv.h | 6 auto &vd = P.VU.elt<int8_t>(rd_num, i, true); 7 auto vs2 = P.VU.elt<int8_t>(rs2_num, i); 8 auto vs1 = P.VU.elt<uint8_t>(rs1_num, i); 14 auto &vd = P.VU.elt<int16_t>(rd_num, i, true); 15 auto vs2 = P.VU.elt<int16_t>(rs2_num, i); 16 auto vs1 = P.VU.elt<uint16_t>(rs1_num, i); 22 auto &vd = P.VU.elt<int32_t>(rd_num, i, true); 23 auto vs2 = P.VU.elt<int32_t>(rs2_num, i); 24 auto vs1 = P.VU.elt<uint32_t>(rs1_num, i); 31 auto vs2 = P.VU.elt<int64_t>(rs2_num, i); [all …]
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H A D | vfmv_s_f.h | 4 require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZFH)) || 5 (P.VU.vsew == e32 && p->extension_enabled('F')) || 6 (P.VU.vsew == e64 && p->extension_enabled('D'))); 9 reg_t vl = P.VU.vl->read(); 11 if (vl > 0 && P.VU.vstart->read() < vl) { 14 switch(P.VU.vsew) { 16 P.VU.elt<uint16_t>(rd_num, 0, true) = f16(FRS1).v; 19 P.VU.elt<uint32_t>(rd_num, 0, true) = f32(FRS1).v; 23 P.VU.elt<uint64_t>(rd_num, 0, true) = f64(FRS1).v; 25 P.VU.elt<uint64_t>(rd_num, 0, true) = f32(FRS1).v; [all …]
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H A D | vmv_s_x.h | 4 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); 5 reg_t vl = P.VU.vl->read(); 7 if (vl > 0 && P.VU.vstart->read() < vl) { 9 reg_t sew = P.VU.vsew; 13 P.VU.elt<uint8_t>(rd_num, 0, true) = RS1; 16 P.VU.elt<uint16_t>(rd_num, 0, true) = RS1; 19 P.VU.elt<uint32_t>(rd_num, 0, true) = RS1; 22 P.VU.elt<uint64_t>(rd_num, 0, true) = RS1; 29 P.VU.vstart->write(0);
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H A D | vcpop_m.h | 2 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); 4 reg_t vl = P.VU.vl->read(); 5 reg_t sew = P.VU.vsew; 8 require(P.VU.vstart->read() == 0); 10 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 14 bool vs2_lsb = ((P.VU.elt<uint32_t>(rs2_num, midx ) >> mpos) & 0x1) == 1; 18 bool do_mask = (P.VU.elt<uint32_t>(0, midx) >> mpos) & 0x1; 22 P.VU.vstart->write(0);
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H A D | vfmv_v_f.h | 2 require_align(insn.rd(), P.VU.vflmul); 4 switch(P.VU.vsew) { 6 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 7 auto &vd = P.VU.elt<float16_t>(rd_num, i, true); 14 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 15 auto &vd = P.VU.elt<float32_t>(rd_num, i, true); 22 for (reg_t i=P.VU.vstart->read(); i<vl; ++i) { 23 auto &vd = P.VU.elt<float64_t>(rd_num, i, true); 31 P.VU.vstart->write(0);
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H A D | vfirst_m.h | 2 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); 4 reg_t vl = P.VU.vl->read(); 5 reg_t sew = P.VU.vsew; 8 require(P.VU.vstart->read() == 0); 10 for (reg_t i=P.VU.vstart->read(); i < vl; ++i) { 13 bool vs2_lsb = ((P.VU.elt<uint64_t>(rs2_num, midx ) >> mpos) & 0x1) == 1; 19 P.VU.vstart->write(0);
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/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/ |
H A D | decode.h | 477 require(P.VU.vsew * 2 <= P.VU.ELEN); \ 485 require(P.VU.vsew * 2 <= P.VU.ELEN); \ 494 reg_t flmul = P.VU.vflmul < 1 ? 1 : P.VU.vflmul; \ 503 reg_t flmul = P.VU.vflmul < 1 ? 1 : P.VU.vflmul; \ 594 require(P.VU.vsew * 2 <= P.VU.ELEN); \ 611 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); \ 636 require(P.VU.vsew >= e8 && P.VU.vsew <= e64); \ 1695 P.VU.vstart->write(P.VU.vstart->read() + 1); \ 1704 P.VU.vstart->write(P.VU.vstart->read() + 1); \ 1719 reg_t i = P.VU.vstart->read() / P.VU.vlenb; \ [all …]
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/dports/math/lapack95/LAPACK95/EXAMPLES2/ |
H A D | ssyevret.f90 | 18 REAL(WP) :: VL, VU variable 230 UPLO = 'T'; VL = 1; VU = 10 234 CALL LA_SYEVR(A, W, JOBZ='T', VL=VL, VU=VU, M=M, INFO=INFO) 237 UPLO = 'U'; VL = 1; VU = 10 241 CALL LA_SYEVR(A, W, 'V', UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) 244 UPLO = 'U'; VL = 1; VU = 10 248 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO) 251 UPLO = 'U'; VL = 1; VU = 10 262 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, ISUPPZ=ISUPPZ, INFO=INFO) 269 CALL LA_SYEVR(A, W, 'N', VL=VL, VU=VU, M=M, INFO=INFO) [all …]
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H A D | dsyevret.f90 | 18 REAL(WP) :: VL, VU variable 230 UPLO = 'T'; VL = 1; VU = 10 234 CALL LA_SYEVR(A, W, JOBZ='T', VL=VL, VU=VU, M=M, INFO=INFO) 237 UPLO = 'U'; VL = 1; VU = 10 241 CALL LA_SYEVR(A, W, 'V', UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) 244 UPLO = 'U'; VL = 1; VU = 10 248 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO) 251 UPLO = 'U'; VL = 1; VU = 10 262 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, ISUPPZ=ISUPPZ, INFO=INFO) 269 CALL LA_SYEVR(A, W, 'N', VL=VL, VU=VU, M=M, INFO=INFO) [all …]
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H A D | zheevret.f90 | 18 REAL(WP) :: VL, VU variable 230 UPLO = 'T'; VL = 1; VU = 10 234 CALL LA_HEEVR(A, W, 'T', VL=VL, VU=VU, M=M, INFO=INFO) 237 UPLO = 'U'; VL = 1; VU = 10 241 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) 244 UPLO = 'U'; VL = 1; VU = 10 248 CALL LA_HEEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO) 251 UPLO = 'U'; VL = 1; VU = 10 262 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, ISUPPZ=ISUPPZ, INFO=INFO) 269 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) [all …]
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H A D | cheevret.f90 | 18 REAL(WP) :: VL, VU variable 230 UPLO = 'T'; VL = 1; VU = 10 234 CALL LA_HEEVR(A, W, 'T', VL=VL, VU=VU, M=M, INFO=INFO) 237 UPLO = 'U'; VL = 1; VU = 10 241 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) 244 UPLO = 'U'; VL = 1; VU = 10 248 CALL LA_HEEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO) 251 UPLO = 'U'; VL = 1; VU = 10 262 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, ISUPPZ=ISUPPZ, INFO=INFO) 269 CALL LA_HEEVR(A, W, JOBZ='V',UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) [all …]
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/gcc/ada/ |
H A D | s-geveop.adb | 39 VU : constant Address := Vectors.Vector'Size / Storage_Unit; constant 55 Unaligned : constant Boolean := (RA or XA or YA) mod VU /= 0; 64 SA : constant Address := XA + ((Length + 0) / VU * VU 71 XA := XA + VU; 72 YA := YA + VU; 73 RA := RA + VU; 96 Unaligned : constant Boolean := (RA or XA) mod VU /= 0; 105 SA : constant Address := XA + ((Length + 0) / VU * VU 112 XA := XA + VU; 113 RA := RA + VU;
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/gcc/ada/ |
H A D | s-geveop.adb | 39 VU : constant Address := Vectors.Vector'Size / Storage_Unit; constant 55 Unaligned : constant Boolean := (RA or XA or YA) mod VU /= 0; 64 SA : constant Address := XA + ((Length + 0) / VU * VU 71 XA := XA + VU; 72 YA := YA + VU; 73 RA := RA + VU; 96 Unaligned : constant Boolean := (RA or XA) mod VU /= 0; 105 SA : constant Address := XA + ((Length + 0) / VU * VU 112 XA := XA + VU; 113 RA := RA + VU;
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/dports/math/lapack95/LAPACK95/EXAMPLES2/Old000807/ |
H A D | syevret.base | 29 REAL(WP) :: VL, VU 248 WRITE(NOUT,*) "CALL LA_SYEVR(A, W, 'T', VL=VL, VU=VU, M=M, INFO=INFO)" 250 CALL LA_SYEVR(A, W, JOBZ='T', VL=VL, VU=VU, M=M, INFO=INFO) 257 CALL LA_SYEVR(A, W, 'V', UPLO='U', VL=VL, VU=VU, M=M, INFO=INFO) 262 WRITE(NOUT,*) "CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO)" 264 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, INFO=INFO) 278 CALL LA_SYEVR(A, W, 'U', VL=VL, VU=VU, M=M, ISUPPZ=ISUPPZ, INFO=INFO) 285 CALL LA_SYEVR(A, W, 'N', VL=VL, VU=VU, M=M, INFO=INFO) 292 CALL LA_SYEVR(A, W, 'V', VL=VL, VU=VU, IL=IL, IU=IU, M=M, INFO=INFO) 510 CALL LA_HEEVR(A, W, 'T', VL=VL, VU=VU, M=M, INFO=INFO) [all …]
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/dports/devel/tla/tla-1.3.5/src/docs-hackerlab/texi/ |
H A D | safe.texi | 3 @node An Errorless Front-end to the VU File-system Interface 4 @chapter An Errorless Front-end to the VU File-system Interface 22 See @strong{vu_access} in @ref{The VU File-system Interface}. 40 See @strong{vu_chdir} in @ref{The VU File-system Interface}. 55 See @strong{vu_chmod} in @ref{The VU File-system Interface}. 70 See @strong{vu_chown} in @ref{The VU File-system Interface}. 85 See @strong{vu_chroot} in @ref{The VU File-system Interface}. 100 See @strong{vu_close} in @ref{The VU File-system Interface}. 175 See @strong{vu_fstat} in @ref{The VU File-system Interface}. 220 See @strong{vu_link} in @ref{The VU File-system Interface}. [all …]
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