1 /* 2 * Copyright (C) 2020-2021 Intel Corporation 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 */ 7 8 #pragma once 9 10 #include <stdint.h> 11 12 namespace L0 { 13 14 namespace KmdSysman { 15 constexpr uint32_t KmdMaxBufferSize = 2048; 16 constexpr uint32_t MaxPropertyBufferSize = 128; 17 constexpr uint32_t PcEscapeOperation = 35; 18 constexpr uint32_t KmdSysmanSuccess = 0; 19 constexpr uint32_t KmdSysmanFail = 1; 20 constexpr uint32_t KmdMajorVersion = 1; 21 constexpr uint32_t KmdMinorVersion = 0; 22 constexpr uint32_t KmdPatchNumber = 0; 23 24 struct GfxSysmanMainHeaderIn { 25 uint32_t inVersion; 26 uint32_t inNumElements; 27 uint32_t inTotalsize; 28 uint8_t inBuffer[KmdMaxBufferSize]; 29 }; 30 31 struct GfxSysmanMainHeaderOut { 32 uint32_t outStatus; 33 uint32_t outNumElements; 34 uint32_t outTotalSize; 35 uint8_t outBuffer[KmdMaxBufferSize]; 36 }; 37 38 struct GfxSysmanReqHeaderIn { 39 uint32_t inRequestId; 40 uint32_t inCommand; 41 uint32_t inComponent; 42 uint32_t inCommandParam; 43 uint32_t inDataSize; 44 }; 45 46 struct GfxSysmanReqHeaderOut { 47 uint32_t outRequestId; 48 uint32_t outComponent; 49 uint32_t outReturnCode; 50 uint32_t outDataSize; 51 }; 52 53 enum Command { 54 Get = 0, 55 Set, 56 RegisterEvent, 57 UnregisterEvent, 58 59 MaxCommands, 60 }; 61 62 enum Events { 63 EnergyThresholdCrossed = 0, 64 EnterD0, 65 EnterD3, 66 EnterTDR, 67 ExitTDR, 68 FrequencyThrottled, 69 CriticalTemperature, 70 TemperatureThreshold1, 71 TemperatureThreshold2, 72 ResetDeviceRequired, 73 74 MaxEvents, 75 }; 76 77 enum Component { 78 InterfaceProperties = 0, 79 PowerComponent, 80 FrequencyComponent, 81 ActivityComponent, 82 FanComponent, 83 TemperatureComponent, 84 FpsComponent, 85 SchedulerComponent, 86 MemoryComponent, 87 PciComponent, 88 GlobalOperationsComponent, 89 90 MaxComponents, 91 }; 92 93 namespace Requests { 94 95 enum Interface { 96 InterfaceVersion = 0, 97 98 MaxInterfaceRequests, 99 }; 100 101 enum Power { 102 NumPowerDomains = 0, 103 104 // support / enabled 105 EnergyThresholdSupported, 106 EnergyThresholdEnabled, 107 PowerLimit1Enabled, 108 PowerLimit2Enabled, 109 110 // default fused values 111 PowerLimit1Default, 112 PowerLimit2Default, 113 PowerLimit1TauDefault, 114 PowerLimit4AcDefault, 115 PowerLimit4DcDefault, 116 EnergyThresholdDefault, 117 TdpDefault, 118 MinPowerLimitDefault, 119 MaxPowerLimitDefault, 120 EnergyCounterUnits, 121 122 // current runtime values 123 CurrentPowerLimit1, 124 CurrentPowerLimit2, 125 CurrentPowerLimit1Tau, 126 CurrentPowerLimit4Ac, 127 CurrentPowerLimit4Dc, 128 CurrentEnergyThreshold, 129 DisableEnergyThreshold, 130 CurrentEnergyCounter, 131 132 MaxPowerRequests, 133 }; 134 135 enum Activity { 136 NumActivityDomains = 0, 137 138 // default fused values 139 ActivityCounterNumberOfBits, 140 ActivityCounterFrequency, 141 TimestampFrequency, 142 143 // current runtime values 144 CurrentActivityCounter, 145 146 MaxActivityRequests, 147 }; 148 149 enum Temperature { 150 NumTemperatureDomains = 0, 151 152 // support / enabled 153 TempCriticalEventSupported, 154 TempThreshold1EventSupported, 155 TempThreshold2EventSupported, 156 TempCriticalEventEnabled, 157 TempThreshold1EventEnabled, 158 TempThreshold2EventEnabled, 159 160 // default fused values 161 MaxTempSupported, 162 163 // current runtime values 164 CurrentTemperature, 165 166 MaxTemperatureRequests, 167 }; 168 169 enum Frequency { 170 NumFrequencyDomains = 0, 171 172 // support / enabled 173 FrequencyOcSupported, 174 VoltageOverrideSupported, 175 VoltageOffsetSupported, 176 HighVoltageModeSupported, 177 ExtendedOcSupported, 178 FixedModeSupported, 179 HighVoltageEnabled, 180 CanControlFrequency, 181 FrequencyThrottledEventSupported, 182 183 // default fused values 184 TjMaxDefault, 185 IccMaxDefault, 186 MaxOcFrequencyDefault, 187 MaxNonOcFrequencyDefault, 188 MaxOcVoltageDefault, 189 MaxNonOcVoltageDefault, 190 FrequencyRangeMinDefault, 191 FrequencyRangeMaxDefault, 192 193 // current runtime values 194 CurrentFrequencyTarget, 195 CurrentVoltageTarget, 196 CurrentVoltageOffset, 197 CurrentVoltageMode, 198 CurrentFixedMode, 199 CurrentTjMax, 200 CurrentIccMax, 201 CurrentVoltage, 202 CurrentRequestedFrequency, 203 CurrentTdpFrequency, 204 CurrentEfficientFrequency, 205 CurrentResolvedFrequency, 206 CurrentThrottleReasons, 207 CurrentThrottleTime, 208 CurrentFrequencyRange, 209 210 MaxFrequencyRequests, 211 }; 212 213 enum Fans { 214 NumFanDomains = 0, 215 216 // default fused values 217 MaxFanControlPointsSupported, 218 MaxFanSpeedSupported, 219 220 // current runtime values 221 CurrentNumOfControlPoints, 222 CurrentFanPoint, 223 CurrentFanSpeed, 224 225 MaxFanRequests, 226 }; 227 228 enum Fps { 229 NumFpsDomains = 0, 230 IsDisplayAttached, 231 InstRenderTime, 232 TimeToFlip, 233 AvgFps, 234 AvgRenderTime, 235 AvgInstFps, 236 237 MaxFpsRequests, 238 }; 239 240 enum Scheduler { 241 NumSchedulerDomains = 0, 242 243 MaxSchedulerRequests, 244 }; 245 246 enum Memory { 247 NumMemoryDomains = 0, 248 249 // default fused values 250 MemoryType, 251 MemoryLocation, 252 PhysicalSize, 253 StolenSize, 254 SystemSize, 255 DedicatedSize, 256 MemoryWidth, 257 NumChannels, 258 MaxBandwidth, 259 260 // current runtime values 261 CurrentBandwidthRead, 262 CurrentBandwidthWrite, 263 CurrentFreeMemorySize, 264 CurrentTotalAllocableMem, 265 266 MaxMemoryRequests 267 }; 268 269 enum Pci { 270 NumPciDomains = 0, 271 272 // support / enabled 273 BandwidthCountersSupported, 274 PacketCountersSupported, 275 ReplayCountersSupported, 276 277 // default fused values 278 DeviceId, 279 VendorId, 280 Domain, 281 Bus, 282 Device, 283 Function, 284 Gen, 285 DevType, 286 MaxLinkWidth, 287 MaxLinkSpeed, 288 BusInterface, 289 BusWidth, 290 BarType, 291 BarIndex, 292 BarBase, 293 BarSize, 294 295 // current runtime values 296 CurrentLinkWidth, 297 CurrentLinkSpeed, 298 CurrentLinkStatus, 299 CurrentLinkQualityFlags, 300 CurrentLinkStabilityFlags, 301 CurrentLinkReplayCounter, 302 CurrentLinkPacketCounter, 303 CurrentLinkRxCounter, 304 CurrentLinkTxCounter, 305 306 // resizable bar 307 ResizableBarSupported, 308 ResizableBarEnabled, 309 310 MaxPciRequests, 311 }; 312 313 enum GlobalOperation { 314 NumGlobalOperationDomains = 0, 315 316 TriggerDeviceLevelReset 317 }; 318 319 } // namespace Requests 320 321 enum FlipType { 322 MMIOFlip = 0, 323 MMIOAsyncFlip, 324 DMAFlip, 325 DMAAsyncFlip, 326 327 MaxFlipTypes, 328 }; 329 330 enum GeneralDomainsType { 331 GeneralDomainDGPU = 0, 332 GeneralDomainHBM, 333 334 GeneralDomainMaxTypes, 335 }; 336 337 enum TemperatureDomainsType { 338 TemperatureDomainPackage = 0, 339 TemperatureDomainDGPU, 340 TemperatureDomainHBM, 341 342 TempetatureMaxDomainTypes, 343 }; 344 345 enum ActivityDomainsType { 346 ActitvityDomainGT = 0, 347 ActivityDomainRenderCompute, 348 ActivityDomainMedia, 349 350 ActivityDomainMaxTypes, 351 }; 352 353 enum PciDomainsType { 354 PciCurrentDevice = 0, 355 PciParentDevice, 356 PciRootPort, 357 358 PciDomainMaxTypes, 359 }; 360 361 enum MemoryType { 362 DDR4 = 0, 363 DDR5, 364 LPDDR5, 365 LPDDR4, 366 DDR3, 367 LPDDR3, 368 GDDR4, 369 GDDR5, 370 GDDR5X, 371 GDDR6, 372 GDDR6X, 373 GDDR7, 374 UknownMemType, 375 376 MaxMemoryTypes, 377 }; 378 379 enum MemoryWidthType { 380 MemWidth8x = 0, 381 MemWidth16x, 382 MemWidth32x, 383 384 UnknownMemWidth, 385 386 MaxMemoryWidthTypes, 387 }; 388 389 enum MemoryLocationsType { 390 SystemMemory = 0, 391 DeviceMemory, 392 393 UnknownMemoryLocation, 394 395 MaxMemoryLocationTypes, 396 }; 397 398 enum PciGensType { 399 PciGen1_1 = 0, 400 PciGen2_0, 401 PciGen3_0, 402 PciGen4_0, 403 404 UnknownPciGen, 405 406 MaxPciGenTypes, 407 }; 408 409 enum PciLinkSpeedType { 410 UnknownPciLinkSpeed = 0, 411 PciLinkSpeed2_5 = 1, 412 PciLinkSpeed5_0, 413 PciLinkSpeed8_0, 414 PciLinkSpeed16_0, 415 416 MaxPciLinkSpeedTypes, 417 }; 418 419 enum ReturnCodes { 420 Success = 0, 421 422 PcuError, 423 IllegalCommand, 424 TimeOut, 425 IllegalData, 426 IllegalSubCommand, 427 OverclockingLocked, 428 DomainServiceNotSupported, 429 FrequencyExceedsMax, 430 VoltageExceedsMax, 431 OverclockingNotSupported, 432 InvalidVr, 433 InvalidIccMax, 434 VoltageOverrideDisabled, 435 ServiceNotAvailable, 436 InvalidRequestType, 437 InvalidComponent, 438 BufferNotLargeEnough, 439 GetNotSupported, 440 SetNotSupported, 441 MissingProperties, 442 InvalidEvent, 443 CreateEventError, 444 ErrorVersion, 445 ErrorSize, 446 ErrorNoElements, 447 ErrorBufferCorrupted, 448 VTNotSupported, 449 NotInitialized, 450 PropertyNotSet, 451 InvalidFlipType, 452 }; 453 454 enum PciLinkWidthType { 455 PciLinkWidth1x = 0, 456 PciLinkWidth2x, 457 PciLinkWidth4x, 458 PciLinkWidth8x, 459 PciLinkWidth12x, 460 PciLinkWidth16x, 461 PciLinkWidth32x, 462 463 UnknownPciLinkWidth, 464 465 MaxPciLinkWidthTypes, 466 }; 467 468 struct KmdSysmanVersion { KmdSysmanVersionKmdSysmanVersion469 KmdSysmanVersion() : data(0) {} 470 union { 471 struct { 472 uint32_t reservedBits : 8; 473 uint32_t majorVersion : 8; 474 uint32_t minorVersion : 8; 475 uint32_t patchNumber : 8; 476 }; 477 uint32_t data; 478 }; 479 }; 480 481 struct RequestProperty { RequestPropertyRequestProperty482 RequestProperty() : requestId(0), commandId(0), componentId(0), paramInfo(0), dataSize(0) {} RequestPropertyRequestProperty483 RequestProperty(const RequestProperty &other) { 484 requestId = other.requestId; 485 commandId = other.commandId; 486 componentId = other.componentId; 487 paramInfo = other.paramInfo; 488 dataSize = other.dataSize; 489 if (other.dataSize > 0 && other.dataSize < MaxPropertyBufferSize && other.dataBuffer) { 490 memcpy_s(dataBuffer, other.dataSize, other.dataBuffer, other.dataSize); 491 } 492 } RequestPropertyRequestProperty493 RequestProperty(uint32_t _requestId, 494 uint32_t _commandId, 495 uint32_t _componentId, 496 uint32_t _paramInfo, 497 uint32_t _dataSize, 498 uint8_t *_dataBuffer) { 499 requestId = _requestId; 500 commandId = _commandId; 501 componentId = _componentId; 502 paramInfo = _paramInfo; 503 dataSize = _dataSize; 504 if (dataSize > 0 && dataSize < MaxPropertyBufferSize && _dataBuffer) { 505 memcpy_s(dataBuffer, dataSize, _dataBuffer, dataSize); 506 } 507 } 508 RequestProperty &operator=(const RequestProperty &other) { 509 requestId = other.requestId; 510 commandId = other.commandId; 511 componentId = other.componentId; 512 paramInfo = other.paramInfo; 513 dataSize = other.dataSize; 514 if (other.dataSize > 0 && other.dataSize < MaxPropertyBufferSize && other.dataBuffer) { 515 memcpy_s(dataBuffer, other.dataSize, other.dataBuffer, other.dataSize); 516 } 517 return *this; 518 } 519 uint32_t requestId; 520 uint32_t commandId; 521 uint32_t componentId; 522 uint32_t paramInfo; 523 uint32_t dataSize; 524 uint8_t dataBuffer[MaxPropertyBufferSize] = {0}; 525 }; 526 527 struct ResponseProperty { ResponsePropertyResponseProperty528 ResponseProperty() : requestId(0), returnCode(0), componentId(0), dataSize(0) {} ResponsePropertyResponseProperty529 ResponseProperty(const ResponseProperty &other) { 530 requestId = other.requestId; 531 returnCode = other.returnCode; 532 componentId = other.componentId; 533 dataSize = other.dataSize; 534 if (other.dataSize > 0 && other.dataSize < MaxPropertyBufferSize && other.dataBuffer) { 535 memcpy_s(dataBuffer, other.dataSize, other.dataBuffer, other.dataSize); 536 } 537 } ResponsePropertyResponseProperty538 ResponseProperty(uint32_t _requestId, 539 uint32_t _returnCode, 540 uint32_t _componentId, 541 uint32_t _dataSize, 542 uint8_t *_dataBuffer) { 543 requestId = _requestId; 544 returnCode = _returnCode; 545 componentId = _componentId; 546 dataSize = _dataSize; 547 if (dataSize > 0 && dataSize < MaxPropertyBufferSize && _dataBuffer) { 548 memcpy_s(dataBuffer, dataSize, _dataBuffer, dataSize); 549 } 550 } 551 ResponseProperty &operator=(const ResponseProperty &other) { 552 this->requestId = other.requestId; 553 this->returnCode = other.returnCode; 554 this->componentId = other.componentId; 555 this->dataSize = other.dataSize; 556 if (other.dataSize > 0 && other.dataSize < MaxPropertyBufferSize && other.dataBuffer) { 557 memcpy_s(this->dataBuffer, other.dataSize, other.dataBuffer, other.dataSize); 558 } 559 return *this; 560 } 561 562 uint32_t requestId; 563 uint32_t returnCode; 564 uint32_t componentId; 565 uint32_t dataSize; 566 uint8_t dataBuffer[MaxPropertyBufferSize] = {0}; 567 }; 568 } // namespace KmdSysman 569 } // namespace L0 570