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Searched refs:XCHAL_NUM_DBREAK (Results 1 – 25 of 430) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/xtensa/kernel/
H A Dhw_breakpoint.c21 static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[XCHAL_NUM_DBREAK]);
29 return XCHAL_NUM_DBREAK; in hw_breakpoint_slots()
99 BUILD_BUG_ON(XCHAL_NUM_DBREAK > 2); in xtensa_wsr()
113 #if XCHAL_NUM_DBREAK > 0 in xtensa_wsr()
121 #if XCHAL_NUM_DBREAK > 1 in xtensa_wsr()
184 i = alloc_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_install_hw_breakpoint()
223 i = free_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_uninstall_hw_breakpoint()
244 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in flush_ptrace_hw_breakpoint()
267 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in restore_dbreak()
293 if (dbnum < XCHAL_NUM_DBREAK && bp[dbnum]) { in check_hw_breakpoint()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/xtensa/kernel/
H A Dhw_breakpoint.c21 static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[XCHAL_NUM_DBREAK]);
29 return XCHAL_NUM_DBREAK; in hw_breakpoint_slots()
99 BUILD_BUG_ON(XCHAL_NUM_DBREAK > 2); in xtensa_wsr()
113 #if XCHAL_NUM_DBREAK > 0 in xtensa_wsr()
121 #if XCHAL_NUM_DBREAK > 1 in xtensa_wsr()
184 i = alloc_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_install_hw_breakpoint()
223 i = free_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_uninstall_hw_breakpoint()
244 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in flush_ptrace_hw_breakpoint()
267 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in restore_dbreak()
293 if (dbnum < XCHAL_NUM_DBREAK && bp[dbnum]) { in check_hw_breakpoint()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/xtensa/kernel/
H A Dhw_breakpoint.c21 static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[XCHAL_NUM_DBREAK]);
29 return XCHAL_NUM_DBREAK; in hw_breakpoint_slots()
99 BUILD_BUG_ON(XCHAL_NUM_DBREAK > 2); in xtensa_wsr()
113 #if XCHAL_NUM_DBREAK > 0 in xtensa_wsr()
121 #if XCHAL_NUM_DBREAK > 1 in xtensa_wsr()
184 i = alloc_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_install_hw_breakpoint()
223 i = free_slot(this_cpu_ptr(wp_on_reg), XCHAL_NUM_DBREAK, bp); in arch_uninstall_hw_breakpoint()
244 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in flush_ptrace_hw_breakpoint()
267 for (i = 0; i < XCHAL_NUM_DBREAK; ++i) { in restore_dbreak()
293 if (dbnum < XCHAL_NUM_DBREAK && bp[dbnum]) { in check_hw_breakpoint()
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/
H A Dxtensa-config.h126 #undef XCHAL_NUM_DBREAK
127 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gcc/include/
H A Dxtensa-config.h126 #undef XCHAL_NUM_DBREAK
127 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gcc/include/
H A Dxtensa-config.h126 #undef XCHAL_NUM_DBREAK
127 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/
H A Dxtensa-config.h126 #undef XCHAL_NUM_DBREAK
127 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/gcc-4.1-20060728/include/
H A Dxtensa-config.h132 #undef XCHAL_NUM_DBREAK
133 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/
H A Dxtensa-config.h132 #undef XCHAL_NUM_DBREAK
133 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/djgpp-binutils/binutils-2.17/include/
H A Dxtensa-config.h138 #undef XCHAL_NUM_DBREAK
139 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc6-aux/gcc-6-20180516/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc11-devel/gcc-11-20211009/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc12-devel/gcc-12-20211205/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc8/gcc-8.5.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc10/gcc-10.3.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/gnulibiberty/binutils-2.37/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/arm-elf-binutils/binutils-2.37/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/avr-gdb/gdb-7.3.1/include/
H A Dxtensa-config.h156 #undef XCHAL_NUM_DBREAK
157 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gnatdroid-binutils/binutils-2.27/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/lang/gcc9-devel/gcc-9-20211007/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/include/
H A Dxtensa-config.h155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK 2 macro

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