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Searched refs:XISEL (Results 1 – 25 of 55) sorted by relevance

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/dports/games/iortcw/iortcw-1.51c/MP/code/qcommon/
H A Dvm_powerpc_asm.c760 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
761 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/games/ioquake3/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c763 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
764 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/games/ioquake3-server/ioquake3-1.36/code/qcommon/
H A Dvm_powerpc_asm.c763 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
764 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/games/iortcw/iortcw-1.51c/SP/code/qcommon/
H A Dvm_powerpc_asm.c760 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
761 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/games/openarena/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c762 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
763 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/games/openarena-server/openarena-engine-source-0.8.8/code/qcommon/
H A Dvm_powerpc_asm.c762 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
763 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/devel/vasm/vasm/cpus/ppc/
H A Dcpu.h211 #define XISEL(op, xop) (OP (op) | ((((uint32_t)(xop)) & 0x1f) << 1)) macro
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A DChangeLog129 (XISEL, XISEL_MASK): Add cr field and simplify.
130 (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
/dports/devel/gdb/gdb-11.1/opcodes/
H A DChangeLog119 (XISEL, XISEL_MASK): Add cr field and simplify.
120 (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A DChangeLog129 (XISEL, XISEL_MASK): Add cr field and simplify.
130 (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
/dports/devel/binutils/binutils-2.37/opcodes/
H A DChangeLog129 (XISEL, XISEL_MASK): Add cr field and simplify.
130 (powerpc_opcodes): Use XISEL with extended isel mnemonics and sort
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dppc-opc.c1621 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1622 #define XISEL_MASK XISEL(0x3f, 0x1f)
3217 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dppc-opc.c1636 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1637 #define XISEL_MASK XISEL(0x3f, 0x1f)
3271 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dppc-opc.c1621 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1622 #define XISEL_MASK XISEL(0x3f, 0x1f)
3217 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dppc-opc.c1682 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1683 #define XISEL_MASK XISEL(0x3f, 0x1f)
3321 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/editors/hte/ht-e9e63373148da5d7df397d8075740d8c096ecb1d/asm/
H A Dppcopc.cc1070 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1071 #define XISEL_MASK XISEL(0x3f, 0x1f)
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dppc-dis.c1812 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1813 #define XISEL_MASK XISEL(0x3f, 0x1f)
3460 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dppc.c1813 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1814 #define XISEL_MASK XISEL(0x3f, 0x1f)
3468 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/ppc/gnu/
H A Dppc-opc.c1675 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1676 #define XISEL_MASK XISEL(0x3f, 0x1f)
3484 {"isel", XISEL(31,15), XISEL_MASK, PPCISEL, {RT, RA, RB, CRB}},
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dppc.c1816 #define XISEL(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) macro
1817 #define XISEL_MASK XISEL(0x3f, 0x1f)
3471 { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } },

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