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Searched refs:XIVE_TM_OS_PAGE (Results 1 – 25 of 25) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/intc/
H A Dxive.c143 #define XIVE_TM_OS_PAGE 0x2 macro
226 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
356 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
362 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
363 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
/dports/emulators/qemu42/qemu-4.2.1/include/hw/ppc/
H A Dxive.h408 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu-utils/qemu-4.2.1/include/hw/ppc/
H A Dxive.h408 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu42/qemu-4.2.1/hw/intc/
H A Dxive.c228 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
369 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
375 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
376 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c624 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu5/qemu-5.2.0/hw/intc/
H A Dxive.c233 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
467 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
474 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
475 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c710 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/intc/
H A Dxive.c228 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
369 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
375 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
376 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c624 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/intc/
H A Dxive.c233 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
467 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
474 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
475 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c704 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/intc/
H A Dxive.c233 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
467 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
474 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
475 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c704 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu60/qemu-6.0.0/include/hw/ppc/
H A Dxive.h463 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu5/qemu-5.2.0/include/hw/ppc/
H A Dxive.h463 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/ppc/
H A Dxive.h463 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/ppc/
H A Dxive.h471 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/ppc/
H A Dxive.h463 #define XIVE_TM_OS_PAGE 0x2 macro
/dports/emulators/qemu/qemu-6.2.0/hw/intc/
H A Dxive.c231 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
465 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
472 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
473 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c711 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu60/qemu-6.0.0/hw/intc/
H A Dxive.c247 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
481 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
488 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
489 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c711 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/intc/
H A Dxive.c247 [XIVE_TM_OS_PAGE] = xive_tm_os_view,
481 { XIVE_TM_OS_PAGE, TM_QW1_OS + TM_CPPR, 1, xive_tm_set_os_cppr, NULL },
488 { XIVE_TM_OS_PAGE, TM_SPC_ACK_OS_REG, 2, NULL, xive_tm_ack_os_reg },
489 { XIVE_TM_OS_PAGE, TM_SPC_SET_OS_PENDING, 1, xive_tm_set_os_pending, NULL },
H A Dspapr_xive.c711 XIVE_TM_OS_PAGE * (1ull << TM_SHIFT)); in spapr_xive_dt()
/dports/emulators/qemu/qemu-6.2.0/include/hw/ppc/
H A Dxive.h511 #define XIVE_TM_OS_PAGE 0x2 macro