Home
last modified time | relevance | path

Searched refs:XPSR_T (Results 1 – 25 of 36) sorted by relevance

12

/dports/devel/gdb/gdb-11.1/gdb/arch/
H A Darm.h114 #define XPSR_T 0x01000000 macro
/dports/devel/avr-gdb/gdb-7.3.1/gdb/
H A Darm-tdep.h112 #define XPSR_T 0x01000000 macro
/dports/devel/gdb761/gdb-7.6.1/gdb/
H A Darm-tdep.h115 #define XPSR_T 0x01000000 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/
H A Dcpu.h1069 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1197 if (mask & XPSR_T) { in xpsr_write()
1198 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c494 newval |= XPSR_T; in get_cpsr()
/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/
H A Dcpu.h1183 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1318 if (mask & XPSR_T) { in xpsr_write()
1319 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c543 newval |= XPSR_T; in get_cpsr()
/dports/emulators/qemu42/qemu-4.2.1/target/arm/
H A Dcpu.h1183 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1318 if (mask & XPSR_T) { in xpsr_write()
1319 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c543 newval |= XPSR_T; in get_cpsr()
/dports/emulators/qemu5/qemu-5.2.0/target/arm/
H A Dcpu.h1261 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1399 if (mask & XPSR_T) { in xpsr_write()
1400 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c544 newval |= XPSR_T; in get_cpsr()
H A Dcpu.c961 xpsr & XPSR_T ? 'T' : 'A', in arm_cpu_dump_state()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/
H A Dcpu.h1229 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1366 if (mask & XPSR_T) { in xpsr_write()
1367 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c544 newval |= XPSR_T; in get_cpsr()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/
H A Dcpu.h1229 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1366 if (mask & XPSR_T) { in xpsr_write()
1367 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c544 newval |= XPSR_T; in get_cpsr()
/dports/emulators/qemu60/qemu-6.0.0/target/arm/
H A Dcpu.h1279 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1419 if (mask & XPSR_T) { in xpsr_write()
1420 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c544 newval |= XPSR_T; in get_cpsr()
H A Dcpu.c981 xpsr & XPSR_T ? 'T' : 'A', in arm_cpu_dump_state()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/
H A Dcpu.h1291 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1437 if (mask & XPSR_T) { in xpsr_write()
1438 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c564 newval |= XPSR_T; in get_cpsr()
H A Dcpu.c1003 xpsr & XPSR_T ? 'T' : 'A', in arm_cpu_dump_state()
/dports/emulators/qemu/qemu-6.2.0/target/arm/
H A Dcpu.h1291 #define XPSR_T (1U << 24) /* Not the same as CPSR_T ! */ macro
1437 if (mask & XPSR_T) { in xpsr_write()
1438 env->thumb = ((val & XPSR_T) != 0); in xpsr_write()
H A Dmachine.c564 newval |= XPSR_T; in get_cpsr()
H A Dcpu.c1003 xpsr & XPSR_T ? 'T' : 'A', in arm_cpu_dump_state()

12