/dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5194 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5197 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5199 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5212 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5238 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5034 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5037 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5039 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5052 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5078 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5828 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5831 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5833 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5846 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5872 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5821 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5824 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5826 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5839 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5865 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5828 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5831 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5833 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5846 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5872 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5748 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5751 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5753 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5766 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 5792 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6195 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6198 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6200 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6213 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6239 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6069 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6072 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6074 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6087 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6113 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6412 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6415 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6417 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6430 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6456 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6218 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6221 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6223 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6236 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6262 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5976 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 5979 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 5981 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 5994 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6020 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6412 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6415 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6417 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6430 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6456 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6412 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6415 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6417 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6430 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6456 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6218 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6221 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6223 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6236 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6262 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6412 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6415 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6417 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6430 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6456 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6412 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6415 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6417 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6430 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6456 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 6431 bool ZeroN10 = ISD::isBuildVectorAllZeros(N1.getOperand(0).getNode()); in visitOR() local 6434 if ((ZeroN00 != ZeroN01) && (ZeroN10 != ZeroN11)) { in visitOR() 6436 assert((!ZeroN10 || !ZeroN11) && "Both inputs zero!"); in visitOR() 6449 bool M1Zero = M1 < 0 || (ZeroN10 == (M1 < NumElts)); in visitOR() 6475 SDValue NewRHS = ZeroN10 ? N1.getOperand(1) : N1.getOperand(0); in visitOR()
|