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Searched refs:__SHSAX (Results 1 – 25 of 42) sorted by relevance

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/dports/devel/arduino-core/Arduino-b439a77/hardware/arduino/sam/system/CMSIS/CMSIS/DSP_Lib/Source/TransformFunctions/
H A Darm_cfft_radix4_q15.c450 S = __SHSAX(S, T); in arm_radix4_butterfly_q15()
460 R = __SHSAX(S, T); in arm_radix4_butterfly_q15()
568 pSrc[i2] = __SHSAX(S, T); in arm_radix4_butterfly_q15()
585 pSrc[i3] = __SHSAX(S, T); in arm_radix4_butterfly_q15()
1360 R = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1374 S = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1485 pSrc[i3] = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1493 pSrc[i2] = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/DSP_Lib/TransformFunctions/
H A Darm_cfft_radix4_q15.c482 S = __SHSAX(S, T); in arm_radix4_butterfly_q15()
492 R = __SHSAX(S, T); in arm_radix4_butterfly_q15()
596 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
612 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
1394 R = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1410 S = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1515 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
1521 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/DSP_Lib/TransformFunctions/
H A Darm_cfft_radix4_q15.c482 S = __SHSAX(S, T); in arm_radix4_butterfly_q15()
492 R = __SHSAX(S, T); in arm_radix4_butterfly_q15()
596 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
612 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
1394 R = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1410 S = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1515 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
1521 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
/dports/devel/tinygo/tinygo-0.14.1/lib/CMSIS/CMSIS/DSP_Lib/Source/TransformFunctions/
H A Darm_cfft_radix4_q15.c482 S = __SHSAX(S, T); in arm_radix4_butterfly_q15()
492 R = __SHSAX(S, T); in arm_radix4_butterfly_q15()
596 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
612 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_q15()
1394 R = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1410 S = __SHSAX(S, T); in arm_radix4_butterfly_inverse_q15()
1515 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
1521 *__SIMD32(ptr1)++ = __SHSAX(S, U); in arm_radix4_butterfly_inverse_q15()
/dports/devel/arduino-core/Arduino-b439a77/hardware/arduino/sam/system/CMSIS/CMSIS/Include/
H A Dcore_cm4_simd.h79 #define __SHSAX __shsax macro
452 __attribute__( ( always_inline ) ) static __INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dcore_cm4_simd.h79 #define __SHSAX __shsax macro
400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dcore_cm4_simd.h79 #define __SHSAX __shsax macro
400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dcore_cm4_simd.h79 #define __SHSAX __shsax macro
452 __attribute__( ( always_inline ) ) static __INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
H A Dcore_cm4_simd.h93 #define __SHSAX __shsax macro
416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/
H A Dcore_cm4_simd.h93 #define __SHSAX __shsax in setup()
416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) in setup()
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/
H A Dcore_cm4_simd.h93 #define __SHSAX __shsax macro
416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/
H A Dcore_cm4_simd.h93 #define __SHSAX __shsax macro
416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dcore_cmSimd.h95 #define __SHSAX __shsax macro
393 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
/dports/devel/tinygo/tinygo-0.14.1/lib/CMSIS/CMSIS/Include/
H A Dcmsis_armcc.h693 #define __SHSAX __shsax macro
H A Dcmsis_gcc.h1090 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) in __SHSAX() function
/dports/lang/micropython/micropython-1.17/lib/cmsis/inc/
H A Dcmsis_armcc.h828 #define __SHSAX __shsax macro
H A Dcmsis_armclang.h1374 #define __SHSAX __builtin_arm_shsax macro
H A Dcmsis_iccarm.h437 #define __SHSAX __iar_builtin_SHSAX macro

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