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Searched refs:_aclk_core (Results 1 – 15 of 15) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/rockchip/
H A Dclk-rk3188.c115 #define RK3066_CLKSEL1(_aclk_core, _aclk_hclk, _aclk_pclk, _ahb2apb) \ argument
118 .val = HIWORD_UPDATE(_aclk_core, RK3066_DIV_ACLK_CORE_MASK, \
161 #define RK3188_CLKSEL1(_aclk_core) \ argument
164 .val = HIWORD_UPDATE(_aclk_core, RK3188_DIV_ACLK_CORE_MASK,\
167 #define RK3188_CPUCLK_RATE(_prate, _core_peri, _aclk_core) \ argument
172 RK3188_CLKSEL1(_aclk_core), \
H A Dclk-rk3328.c93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
96 .val = HIWORD_UPDATE(_aclk_core, RK3328_DIV_ACLKM_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-px30.c78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
81 .val = HIWORD_UPDATE(_aclk_core, PX30_DIV_ACLKM_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3308.c74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
77 .val = HIWORD_UPDATE(_aclk_core, RK3308_DIV_ACLKM_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3568.c116 #define RK3568_CLKSEL2(_aclk_core) \ argument
119 .val = HIWORD_UPDATE(_aclk_core, RK3568_DIV_ACLK_CORE_MASK, \
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/rockchip/
H A Dclk-rk3188.c115 #define RK3066_CLKSEL1(_aclk_core, _aclk_hclk, _aclk_pclk, _ahb2apb) \ argument
118 .val = HIWORD_UPDATE(_aclk_core, RK3066_DIV_ACLK_CORE_MASK, \
161 #define RK3188_CLKSEL1(_aclk_core) \ argument
164 .val = HIWORD_UPDATE(_aclk_core, RK3188_DIV_ACLK_CORE_MASK,\
167 #define RK3188_CPUCLK_RATE(_prate, _core_peri, _aclk_core) \ argument
172 RK3188_CLKSEL1(_aclk_core), \
H A Dclk-rk3328.c93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
96 .val = HIWORD_UPDATE(_aclk_core, RK3328_DIV_ACLKM_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-px30.c78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
81 .val = HIWORD_UPDATE(_aclk_core, PX30_DIV_ACLKM_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3308.c74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
77 .val = HIWORD_UPDATE(_aclk_core, RK3308_DIV_ACLKM_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3568.c116 #define RK3568_CLKSEL2(_aclk_core) \ argument
119 .val = HIWORD_UPDATE(_aclk_core, RK3568_DIV_ACLK_CORE_MASK, \
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/rockchip/
H A Dclk-rk3188.c115 #define RK3066_CLKSEL1(_aclk_core, _aclk_hclk, _aclk_pclk, _ahb2apb) \ argument
118 .val = HIWORD_UPDATE(_aclk_core, RK3066_DIV_ACLK_CORE_MASK, \
161 #define RK3188_CLKSEL1(_aclk_core) \ argument
164 .val = HIWORD_UPDATE(_aclk_core, RK3188_DIV_ACLK_CORE_MASK,\
167 #define RK3188_CPUCLK_RATE(_prate, _core_peri, _aclk_core) \ argument
172 RK3188_CLKSEL1(_aclk_core), \
H A Dclk-rk3328.c93 #define RK3328_CLKSEL1(_aclk_core, _pclk_dbg) \ argument
96 .val = HIWORD_UPDATE(_aclk_core, RK3328_DIV_ACLKM_MASK, \
102 #define RK3328_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
106 RK3328_CLKSEL1(_aclk_core, _pclk_dbg), \
H A Dclk-px30.c78 #define PX30_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
81 .val = HIWORD_UPDATE(_aclk_core, PX30_DIV_ACLKM_MASK, \
87 #define PX30_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
91 PX30_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3308.c74 #define RK3308_CLKSEL0(_aclk_core, _pclk_dbg) \ argument
77 .val = HIWORD_UPDATE(_aclk_core, RK3308_DIV_ACLKM_MASK, \
83 #define RK3308_CPUCLK_RATE(_prate, _aclk_core, _pclk_dbg) \ argument
87 RK3308_CLKSEL0(_aclk_core, _pclk_dbg), \
H A Dclk-rk3568.c116 #define RK3568_CLKSEL2(_aclk_core) \ argument
119 .val = HIWORD_UPDATE(_aclk_core, RK3568_DIV_ACLK_CORE_MASK, \