/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 4521 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 8175 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 8184 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 8207 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/aarch64/ |
H A D | aarch64.c | 4659 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 8435 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 8444 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 8467 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc10/gcc-10.3.0/gcc/config/aarch64/ |
H A D | aarch64.c | 4659 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 8381 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 8390 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 8413 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2774 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 4987 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5011 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2774 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 4987 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5011 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2774 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 4987 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5011 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2774 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 4987 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5011 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2774 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 4987 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5011 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc8/gcc-8.5.0/gcc/config/aarch64/ |
H A D | aarch64.c | 2887 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 5111 aarch64_add_sp (ip1_rtx, ip0_rtx, final_adjust, in aarch64_expand_epilogue() 5135 aarch64_add_sp (ip0_rtx, ip1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 5073 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 8882 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 8891 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 8918 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc11/gcc-11.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 5073 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) 8882 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); 8891 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); 8918 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust,
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/aarch64/ |
H A D | aarch64.c | 5211 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 9020 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 9029 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 9056 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/aarch64/ |
H A D | aarch64.c | 5368 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 9189 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 9198 aarch64_add_sp (NULL_RTX, NULL_RTX, sve_callee_adjust, true); in aarch64_expand_epilogue() 9225 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc9/gcc-9.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 3272 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 6025 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 6054 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/aarch64/ |
H A D | aarch64.c | 3108 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 5850 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 5879 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/aarch64/ |
H A D | aarch64.c | 3272 aarch64_add_sp (rtx temp1, rtx temp2, poly_int64 delta, bool emit_move_imm) in aarch64_add_sp() function 6025 aarch64_add_sp (tmp1_rtx, tmp0_rtx, final_adjust, true); in aarch64_expand_epilogue() 6054 aarch64_add_sp (tmp0_rtx, tmp1_rtx, initial_adjust, in aarch64_expand_epilogue()
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/ |
H A D | ChangeLog | 11670 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 12403 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 12410 and aarch64_add_sp.
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/ |
H A D | ChangeLog | 14793 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 15526 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 15533 and aarch64_add_sp.
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/ |
H A D | ChangeLog | 14793 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 15526 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 15533 and aarch64_add_sp.
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/ |
H A D | ChangeLog | 14793 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 15526 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 15533 and aarch64_add_sp.
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/ |
H A D | ChangeLog | 14793 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 15526 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 15533 and aarch64_add_sp.
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/dports/lang/gcc8/gcc-8.5.0/gcc/ |
H A D | ChangeLog | 17612 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 18345 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 18352 and aarch64_add_sp.
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/dports/devel/avr-gcc/gcc-10.2.0/gcc/ |
H A D | ChangeLog-2018 | 32943 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 33676 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 33683 and aarch64_add_sp.
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/ |
H A D | ChangeLog-2018 | 32943 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 33676 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 33683 and aarch64_add_sp.
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/ |
H A D | ChangeLog-2018 | 32943 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass 33676 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as 33683 and aarch64_add_sp.
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