| /dports/emulators/qemu/qemu-6.2.0/capstone/suite/cstest/src/ |
| H A D | tms320c64x_detail.c | 40 add_str(&result, "Invalid"); in get_detail_tms320c64x()
44 add_str(&result, "Constant"); in get_detail_tms320c64x()
48 add_str(&result, "Register"); in get_detail_tms320c64x()
54 add_str(&result, "Invalid"); in get_detail_tms320c64x()
56 add_str(&result, "Forward"); in get_detail_tms320c64x()
58 add_str(&result, "Backward"); in get_detail_tms320c64x()
61 add_str(&result, "Invalid"); in get_detail_tms320c64x()
63 add_str(&result, "No"); in get_detail_tms320c64x()
65 add_str(&result, "Pre"); in get_detail_tms320c64x()
67 add_str(&result, "Post"); in get_detail_tms320c64x()
[all …]
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| H A D | arm_detail.c | 24 add_str(&result, " ; op_count: %u", arm->op_count); in get_detail_arm()
46 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm()
103 add_str(&result, " ; Subtracted: True"); in get_detail_arm()
107 add_str(&result, " ; Code condition: %u", arm->cc); in get_detail_arm()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm()
116 add_str(&result, " ; CPSI-mode: %u", arm->cps_mode); in get_detail_arm()
119 add_str(&result, " ; CPSI-flag: %u", arm->cps_flag); in get_detail_arm()
128 add_str(&result, " ; User-mode: True"); in get_detail_arm()
135 add_str(&result, " ; Registers read:"); in get_detail_arm()
[all …]
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| H A D | arm64_detail.c | 25 add_str(&result, " ; op_count: %u", arm64->op_count); in get_detail_arm64()
47 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm64()
84 add_str(&result, " ; operands[%u].access: READ", i); in get_detail_arm64()
87 add_str(&result, " ; operands[%u].access: WRITE", i); in get_detail_arm64()
96 add_str(&result, " ; Shift: type = %u, value = %u", in get_detail_arm64()
100 add_str(&result, " ; Ext: %u", op->ext); in get_detail_arm64()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm64()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm64()
116 add_str(&result, " ; Code-condition: %u", arm64->cc); in get_detail_arm64()
123 add_str(&result, " ; Registers read:"); in get_detail_arm64()
[all …]
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| H A D | x86_detail.c | 11 add_str(result, "%s", comment); in print_string_hex()
13 add_str(result, "0x%02x", *c & 0xff); in print_string_hex()
15 add_str(result, " "); in print_string_hex()
208 add_str(&result, " ; rex: 0x%x", x86->rex); in get_detail_x86()
210 add_str(&result, " ; modrm: 0x%x", x86->modrm); in get_detail_x86()
214 add_str(&result, " ; sib: 0x%x", x86->sib); in get_detail_x86()
245 add_str(&result, " ; imm_count: %u", count); in get_detail_x86()
307 add_str(&result, " ; Registers read:"); in get_detail_x86()
314 add_str(&result, " ; Registers modified:"); in get_detail_x86()
324 add_str(&result, " ; FPU_FLAGS:"); in get_detail_x86()
[all …]
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| H A D | m680x_detail.c | 16 add_str(&result, "\treading from regs: "); in print_read_write_regs()
20 add_str(&result, ", "); in print_read_write_regs()
22 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_read[i])); in print_read_write_regs()
27 add_str(&result, "\twriting to regs: "); in print_read_write_regs()
31 add_str(&result, ", "); in print_read_write_regs()
33 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_write[i])); in print_read_write_regs()
54 add_str(&result, " ; op_count: %u", m680x->op_count); in get_detail_m680x()
107 add_str(&result, " ; offset: %d", op->idx.offset); in get_detail_m680x()
112 add_str(&result, " ; offset bits: %u", op->idx.offset_bits); in get_detail_m680x()
128 add_str(&result, " ; size: %u", op->size); in get_detail_m680x()
[all …]
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| H A D | m68k_detail.c | 44 add_str(&result, " ; reading from reg: %s", reg_name); in print_read_write_regs()
50 add_str(&result, " ; writing to reg: %s", reg_name); in print_read_write_regs()
71 add_str(&result, " ; op_count: %u", m68k->op_count); in get_detail_m68k()
75 add_str(&result, " ; groups_count: %u", detail->groups_count); in get_detail_m68k()
90 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_m68k()
98 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_m68k()
100 add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale); in get_detail_m68k()
105 add_str(&result, " ; operands[%u].type: FP_SINGLE", i); in get_detail_m68k()
106 add_str(&result, " ; operands[%u].simm: %f", i, op->simm); in get_detail_m68k()
109 add_str(&result, " ; operands[%u].type: FP_DOUBLE", i); in get_detail_m68k()
[all …]
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| H A D | bpf_detail.c | 28 add_str(&result, " ; op_count: %u", bpf->op_count); in get_detail_bpf()
31 add_str(&result, " ; operands[%u].type: ", i); in get_detail_bpf()
34 add_str(&result, "INVALID"); in get_detail_bpf()
40 add_str(&result, "IMM = 0x%" PRIx64, op->imm); in get_detail_bpf()
43 add_str(&result, "OFF = +0x%x", op->off); in get_detail_bpf()
46 add_str(&result, "MEM [base=%s, disp=0x%x]", in get_detail_bpf()
50 add_str(&result, "MMEM = M[0x%x]", op->mmem); in get_detail_bpf()
53 add_str(&result, "MSH = 4*([0x%x]&0xf)", op->msh); in get_detail_bpf()
56 add_str(&result, "EXT = %s", ext_name[op->ext]); in get_detail_bpf()
65 add_str(&result, " ; Registers read:"); in get_detail_bpf()
[all …]
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| H A D | ppc_detail.c | 50 add_str(&result, " ; op_count: %u", ppc->op_count); in get_detail_ppc()
58 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_ppc()
61 add_str(&result, " ; operands[%u].type: IMM = 0x%"PRIx64"", i, op->imm); in get_detail_ppc()
64 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_ppc()
68 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_ppc()
72 add_str(&result, " ; operands[%u].type: CRX", i); in get_detail_ppc()
73 add_str(&result, " ; operands[%u].crx.scale: %d", i, op->crx.scale); in get_detail_ppc()
75 add_str(&result, " ; operands[%u].crx.cond: %s", i, get_bc_name(op->crx.cond)); in get_detail_ppc()
81 add_str(&result, " ; Branch code: %u", ppc->bc); in get_detail_ppc()
84 add_str(&result, " ; Branch hint: %u", ppc->bh); in get_detail_ppc()
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/capstone/suite/cstest/src/ |
| H A D | tms320c64x_detail.c | 40 add_str(&result, "Invalid"); in get_detail_tms320c64x()
44 add_str(&result, "Constant"); in get_detail_tms320c64x()
48 add_str(&result, "Register"); in get_detail_tms320c64x()
54 add_str(&result, "Invalid"); in get_detail_tms320c64x()
56 add_str(&result, "Forward"); in get_detail_tms320c64x()
58 add_str(&result, "Backward"); in get_detail_tms320c64x()
61 add_str(&result, "Invalid"); in get_detail_tms320c64x()
63 add_str(&result, "No"); in get_detail_tms320c64x()
65 add_str(&result, "Pre"); in get_detail_tms320c64x()
67 add_str(&result, "Post"); in get_detail_tms320c64x()
[all …]
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| H A D | arm_detail.c | 24 add_str(&result, " ; op_count: %u", arm->op_count); in get_detail_arm()
46 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm()
103 add_str(&result, " ; Subtracted: True"); in get_detail_arm()
107 add_str(&result, " ; Code condition: %u", arm->cc); in get_detail_arm()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm()
116 add_str(&result, " ; CPSI-mode: %u", arm->cps_mode); in get_detail_arm()
119 add_str(&result, " ; CPSI-flag: %u", arm->cps_flag); in get_detail_arm()
128 add_str(&result, " ; User-mode: True"); in get_detail_arm()
135 add_str(&result, " ; Registers read:"); in get_detail_arm()
[all …]
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| H A D | arm64_detail.c | 25 add_str(&result, " ; op_count: %u", arm64->op_count); in get_detail_arm64()
47 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm64()
84 add_str(&result, " ; operands[%u].access: READ", i); in get_detail_arm64()
87 add_str(&result, " ; operands[%u].access: WRITE", i); in get_detail_arm64()
96 add_str(&result, " ; Shift: type = %u, value = %u", in get_detail_arm64()
100 add_str(&result, " ; Ext: %u", op->ext); in get_detail_arm64()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm64()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm64()
116 add_str(&result, " ; Code-condition: %u", arm64->cc); in get_detail_arm64()
123 add_str(&result, " ; Registers read:"); in get_detail_arm64()
[all …]
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| H A D | x86_detail.c | 11 add_str(result, "%s", comment); in print_string_hex()
13 add_str(result, "0x%02x", *c & 0xff); in print_string_hex()
15 add_str(result, " "); in print_string_hex()
208 add_str(&result, " ; rex: 0x%x", x86->rex); in get_detail_x86()
210 add_str(&result, " ; modrm: 0x%x", x86->modrm); in get_detail_x86()
214 add_str(&result, " ; sib: 0x%x", x86->sib); in get_detail_x86()
245 add_str(&result, " ; imm_count: %u", count); in get_detail_x86()
307 add_str(&result, " ; Registers read:"); in get_detail_x86()
314 add_str(&result, " ; Registers modified:"); in get_detail_x86()
324 add_str(&result, " ; FPU_FLAGS:"); in get_detail_x86()
[all …]
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| H A D | m680x_detail.c | 16 add_str(&result, "\treading from regs: "); in print_read_write_regs()
20 add_str(&result, ", "); in print_read_write_regs()
22 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_read[i])); in print_read_write_regs()
27 add_str(&result, "\twriting to regs: "); in print_read_write_regs()
31 add_str(&result, ", "); in print_read_write_regs()
33 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_write[i])); in print_read_write_regs()
54 add_str(&result, " ; op_count: %u", m680x->op_count); in get_detail_m680x()
107 add_str(&result, " ; offset: %d", op->idx.offset); in get_detail_m680x()
112 add_str(&result, " ; offset bits: %u", op->idx.offset_bits); in get_detail_m680x()
128 add_str(&result, " ; size: %u", op->size); in get_detail_m680x()
[all …]
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| H A D | m68k_detail.c | 44 add_str(&result, " ; reading from reg: %s", reg_name); in print_read_write_regs()
50 add_str(&result, " ; writing to reg: %s", reg_name); in print_read_write_regs()
71 add_str(&result, " ; op_count: %u", m68k->op_count); in get_detail_m68k()
75 add_str(&result, " ; groups_count: %u", detail->groups_count); in get_detail_m68k()
90 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_m68k()
98 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_m68k()
100 add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale); in get_detail_m68k()
105 add_str(&result, " ; operands[%u].type: FP_SINGLE", i); in get_detail_m68k()
106 add_str(&result, " ; operands[%u].simm: %f", i, op->simm); in get_detail_m68k()
109 add_str(&result, " ; operands[%u].type: FP_DOUBLE", i); in get_detail_m68k()
[all …]
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| H A D | bpf_detail.c | 28 add_str(&result, " ; op_count: %u", bpf->op_count); in get_detail_bpf()
31 add_str(&result, " ; operands[%u].type: ", i); in get_detail_bpf()
34 add_str(&result, "INVALID"); in get_detail_bpf()
40 add_str(&result, "IMM = 0x%" PRIx64, op->imm); in get_detail_bpf()
43 add_str(&result, "OFF = +0x%x", op->off); in get_detail_bpf()
46 add_str(&result, "MEM [base=%s, disp=0x%x]", in get_detail_bpf()
50 add_str(&result, "MMEM = M[0x%x]", op->mmem); in get_detail_bpf()
53 add_str(&result, "MSH = 4*([0x%x]&0xf)", op->msh); in get_detail_bpf()
56 add_str(&result, "EXT = %s", ext_name[op->ext]); in get_detail_bpf()
65 add_str(&result, " ; Registers read:"); in get_detail_bpf()
[all …]
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| H A D | ppc_detail.c | 50 add_str(&result, " ; op_count: %u", ppc->op_count); in get_detail_ppc()
58 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_ppc()
61 add_str(&result, " ; operands[%u].type: IMM = 0x%"PRIx64"", i, op->imm); in get_detail_ppc()
64 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_ppc()
68 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_ppc()
72 add_str(&result, " ; operands[%u].type: CRX", i); in get_detail_ppc()
73 add_str(&result, " ; operands[%u].crx.scale: %d", i, op->crx.scale); in get_detail_ppc()
75 add_str(&result, " ; operands[%u].crx.cond: %s", i, get_bc_name(op->crx.cond)); in get_detail_ppc()
81 add_str(&result, " ; Branch code: %u", ppc->bc); in get_detail_ppc()
84 add_str(&result, " ; Branch hint: %u", ppc->bh); in get_detail_ppc()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/capstone/suite/cstest/src/ |
| H A D | tms320c64x_detail.c | 40 add_str(&result, "Invalid"); in get_detail_tms320c64x()
44 add_str(&result, "Constant"); in get_detail_tms320c64x()
48 add_str(&result, "Register"); in get_detail_tms320c64x()
54 add_str(&result, "Invalid"); in get_detail_tms320c64x()
56 add_str(&result, "Forward"); in get_detail_tms320c64x()
58 add_str(&result, "Backward"); in get_detail_tms320c64x()
61 add_str(&result, "Invalid"); in get_detail_tms320c64x()
63 add_str(&result, "No"); in get_detail_tms320c64x()
65 add_str(&result, "Pre"); in get_detail_tms320c64x()
67 add_str(&result, "Post"); in get_detail_tms320c64x()
[all …]
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| H A D | arm_detail.c | 24 add_str(&result, " ; op_count: %u", arm->op_count); in get_detail_arm()
46 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm()
103 add_str(&result, " ; Subtracted: True"); in get_detail_arm()
107 add_str(&result, " ; Code condition: %u", arm->cc); in get_detail_arm()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm()
116 add_str(&result, " ; CPSI-mode: %u", arm->cps_mode); in get_detail_arm()
119 add_str(&result, " ; CPSI-flag: %u", arm->cps_flag); in get_detail_arm()
128 add_str(&result, " ; User-mode: True"); in get_detail_arm()
135 add_str(&result, " ; Registers read:"); in get_detail_arm()
[all …]
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| H A D | arm64_detail.c | 25 add_str(&result, " ; op_count: %u", arm64->op_count); in get_detail_arm64()
47 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_arm64()
84 add_str(&result, " ; operands[%u].access: READ", i); in get_detail_arm64()
87 add_str(&result, " ; operands[%u].access: WRITE", i); in get_detail_arm64()
96 add_str(&result, " ; Shift: type = %u, value = %u", in get_detail_arm64()
100 add_str(&result, " ; Ext: %u", op->ext); in get_detail_arm64()
110 add_str(&result, " ; Update-flags: True"); in get_detail_arm64()
113 add_str(&result, " ; Write-back: True"); in get_detail_arm64()
116 add_str(&result, " ; Code-condition: %u", arm64->cc); in get_detail_arm64()
123 add_str(&result, " ; Registers read:"); in get_detail_arm64()
[all …]
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| H A D | x86_detail.c | 11 add_str(result, "%s", comment); in print_string_hex()
13 add_str(result, "0x%02x", *c & 0xff); in print_string_hex()
15 add_str(result, " "); in print_string_hex()
208 add_str(&result, " ; rex: 0x%x", x86->rex); in get_detail_x86()
210 add_str(&result, " ; modrm: 0x%x", x86->modrm); in get_detail_x86()
214 add_str(&result, " ; sib: 0x%x", x86->sib); in get_detail_x86()
245 add_str(&result, " ; imm_count: %u", count); in get_detail_x86()
307 add_str(&result, " ; Registers read:"); in get_detail_x86()
314 add_str(&result, " ; Registers modified:"); in get_detail_x86()
324 add_str(&result, " ; FPU_FLAGS:"); in get_detail_x86()
[all …]
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| H A D | m680x_detail.c | 16 add_str(&result, "\treading from regs: "); in print_read_write_regs()
20 add_str(&result, ", "); in print_read_write_regs()
22 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_read[i])); in print_read_write_regs()
27 add_str(&result, "\twriting to regs: "); in print_read_write_regs()
31 add_str(&result, ", "); in print_read_write_regs()
33 add_str(&result, "%s", cs_reg_name(*handle, detail->regs_write[i])); in print_read_write_regs()
54 add_str(&result, " ; op_count: %u", m680x->op_count); in get_detail_m680x()
107 add_str(&result, " ; offset: %d", op->idx.offset); in get_detail_m680x()
112 add_str(&result, " ; offset bits: %u", op->idx.offset_bits); in get_detail_m680x()
128 add_str(&result, " ; size: %u", op->size); in get_detail_m680x()
[all …]
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| H A D | m68k_detail.c | 44 add_str(&result, " ; reading from reg: %s", reg_name); in print_read_write_regs()
50 add_str(&result, " ; writing to reg: %s", reg_name); in print_read_write_regs()
71 add_str(&result, " ; op_count: %u", m68k->op_count); in get_detail_m68k()
75 add_str(&result, " ; groups_count: %u", detail->groups_count); in get_detail_m68k()
90 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_m68k()
98 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_m68k()
100 add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale); in get_detail_m68k()
105 add_str(&result, " ; operands[%u].type: FP_SINGLE", i); in get_detail_m68k()
106 add_str(&result, " ; operands[%u].simm: %f", i, op->simm); in get_detail_m68k()
109 add_str(&result, " ; operands[%u].type: FP_DOUBLE", i); in get_detail_m68k()
[all …]
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| H A D | bpf_detail.c | 28 add_str(&result, " ; op_count: %u", bpf->op_count); in get_detail_bpf()
31 add_str(&result, " ; operands[%u].type: ", i); in get_detail_bpf()
34 add_str(&result, "INVALID"); in get_detail_bpf()
40 add_str(&result, "IMM = 0x%" PRIx64, op->imm); in get_detail_bpf()
43 add_str(&result, "OFF = +0x%x", op->off); in get_detail_bpf()
46 add_str(&result, "MEM [base=%s, disp=0x%x]", in get_detail_bpf()
50 add_str(&result, "MMEM = M[0x%x]", op->mmem); in get_detail_bpf()
53 add_str(&result, "MSH = 4*([0x%x]&0xf)", op->msh); in get_detail_bpf()
56 add_str(&result, "EXT = %s", ext_name[op->ext]); in get_detail_bpf()
65 add_str(&result, " ; Registers read:"); in get_detail_bpf()
[all …]
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| H A D | ppc_detail.c | 50 add_str(&result, " ; op_count: %u", ppc->op_count); in get_detail_ppc()
58 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg)); in get_detail_ppc()
61 add_str(&result, " ; operands[%u].type: IMM = 0x%"PRIx64"", i, op->imm); in get_detail_ppc()
64 add_str(&result, " ; operands[%u].type: MEM", i); in get_detail_ppc()
68 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp); in get_detail_ppc()
72 add_str(&result, " ; operands[%u].type: CRX", i); in get_detail_ppc()
73 add_str(&result, " ; operands[%u].crx.scale: %d", i, op->crx.scale); in get_detail_ppc()
75 add_str(&result, " ; operands[%u].crx.cond: %s", i, get_bc_name(op->crx.cond)); in get_detail_ppc()
81 add_str(&result, " ; Branch code: %u", ppc->bc); in get_detail_ppc()
84 add_str(&result, " ; Branch hint: %u", ppc->bh); in get_detail_ppc()
[all …]
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| /dports/games/vultures-eye/vulture-2.3.67/slashem/win/gl/ |
| H A D | gl_stat.c | 96 add_str(win, "??"); in add_val()
111 add_str(win, buffer); in add_val()
128 add_str(win, buf); in do_player()
146 add_str(win, mbot); in do_player()
174 add_str(win, "St:"); in do_characteristics()
191 add_str(win, " Dx:"); in do_characteristics()
234 add_str(win, buf); in do_money_hp()
239 add_str(win, "("); in do_money_hp()
244 add_str(win, "("); in do_money_hp()
261 add_str(win, "/"); in do_money_hp()
[all …]
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