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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AArch64/
H A Darm64-neon-add-pairwise.ll3 declare <8 x i8> @llvm.aarch64.neon.addp.v8i8(<8 x i8>, <8 x i8>)
9 ; CHECK: addp v0.8b, v0.8b, v1.8b
13 declare <16 x i8> @llvm.aarch64.neon.addp.v16i8(<16 x i8>, <16 x i8>)
18 ; CHECK: addp v0.16b, v0.16b, v1.16b
22 declare <4 x i16> @llvm.aarch64.neon.addp.v4i16(<4 x i16>, <4 x i16>)
27 ; CHECK: addp v0.4h, v0.4h, v1.4h
36 ; CHECK: addp v0.8h, v0.8h, v1.8h
45 ; CHECK: addp v0.2s, v0.2s, v1.2s
54 ; CHECK: addp v0.4s, v0.4s, v1.4s
64 ; CHECK: addp v0.2d, v0.2d, v1.2d
[all …]
/dports/net/go-bapu/carlostrub-bapu-23ca6b019fbc/vendor/github.com/gizak/termui/extra/
H A Dtabpane.go157 var addp []point
162 addp = append(addp, p)
165 addp = append(addp, p)
169 return append(addp, p)
197 ps = tp.addPoint(ps, &charOffset, &oftX, addp...)
206 addp := make([]point, 0, 2)
211 addp = append(addp, pt)
218 addp = append(addp, pt)
219 ps = tp.addPoint(ps, &charOffset, &oftX, addp...)
235 ps = append(ps, addp...)
[all …]
/dports/security/vault/vault-1.8.2/vendor/github.com/hashicorp/vic/vendor/github.com/gizak/termui/extra/
H A Dtabpane.go157 var addp []point
162 addp = append(addp, p)
165 addp = append(addp, p)
169 return append(addp, p)
197 ps = tp.addPoint(ps, &charOffset, &oftX, addp...)
206 addp := make([]point, 0, 2)
211 addp = append(addp, pt)
218 addp = append(addp, pt)
219 ps = tp.addPoint(ps, &charOffset, &oftX, addp...)
235 ps = append(ps, addp...)
[all …]
/dports/devel/capstone3/capstone-3.0.5/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/devel/capstone4/capstone-4.0.2/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/emulators/qemu42/qemu-4.2.1/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d
/dports/devel/redasm/REDasm-2.1.1/LibREDasm/depends/capstone/suite/MC/AArch64/
H A Dneon-add-pairwise.s.cs2 0x20,0xbc,0x22,0x0e = addp v0.8b, v1.8b, v2.8b
3 0x20,0xbc,0x22,0x4e = addp v0.16b, v1.16b, v2.16b
4 0x20,0xbc,0x62,0x0e = addp v0.4h, v1.4h, v2.4h
5 0x20,0xbc,0x62,0x4e = addp v0.8h, v1.8h, v2.8h
6 0x20,0xbc,0xa2,0x0e = addp v0.2s, v1.2s, v2.2s
7 0x20,0xbc,0xa2,0x4e = addp v0.4s, v1.4s, v2.4s
8 0x20,0xbc,0xe2,0x4e = addp v0.2d, v1.2d, v2.2d

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