/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/polly/lib/External/isl/imath/tests/ |
H A D | add.tc | 773 addv:51776377,-46479,0:51729898 775 addv:5,20101,=2:20106 776 addv:626,15974,0:16600 777 addv:927,14290,=1:15217 779 addv:93063,60606,=1:153669 780 addv:-4895,63134,0:58239 781 addv:8033997,6091,0:8040088 784 addv:6722,34150,0:40872 786 addv:63333,19921,0:83254 789 addv:21778,35258,0:57036 [all …]
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/dports/games/fillets-ng/fillets-ng-data-1.0.1/script/share/ |
H A D | borejokes.lua | 61 addv(20, "ob-v-mamto") 63 addv(5, "ob-v-napad") 84 addv(10, "ob-v-nebavi") 87 addv(10, "ob-v-hrej") 90 addv(10, "ob-v-sami") 125 addv(5, "ob-v-nerus") 128 addv(5, "ob-v-nerus") 168 addv(5, "ob-v-halo") 186 addv(5, "ob-v-jidlo") 200 addv(5, "ob-v-ostani") [all …]
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/dports/games/fillets-ng/fillets-ng-data-1.0.1/script/key/ |
H A D | code.lua | 6 addv(1, "cactus-1small") 9 addv(0, "cactus-0big") 11 addv(2, "cactus-2big") 34 addv(27, "start-1") 36 addv(41, "start-3") 52 addv(0, "up-0-0") 55 addv(21, "up-0-3") 57 addv(0, "up-1-0") 65 addv(0, "down-0-0") 68 addv(0, "down-1-0") [all …]
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/dports/games/fillets-ng/fillets-ng-data-1.0.1/script/keys/ |
H A D | code.lua | 31 addv(7, "init-0-1") 33 addv(randint(9, 20), "init-0-3") 46 addv(9, "rand-0-1") 61 addv(0, "rand-1-0") 65 addv(0, "rand-2-0") 69 addv(7, "rand-3-1") 75 addv(0, "rand-4-0") 77 addv(14, "rand-4-2") 84 addv(0, "rand-5-0") 88 addv(0, "rand-6-0") [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/Mips/msa/ |
H A D | spill.ll | 76 %r1 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %0, <16 x i8> %1) 77 %r2 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r1, <16 x i8> %2) 78 %r3 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r2, <16 x i8> %3) 79 %r4 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r3, <16 x i8> %4) 80 %r5 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r4, <16 x i8> %5) 81 %r6 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r5, <16 x i8> %6) 82 %r7 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r6, <16 x i8> %7) 146 declare <16 x i8> @llvm.mips.addv.b(<16 x i8>, <16 x i8>) nounwind 295 declare <8 x i16> @llvm.mips.addv.h(<8 x i16>, <8 x i16>) nounwind 444 declare <4 x i32> @llvm.mips.addv.w(<4 x i32>, <4 x i32>) nounwind [all …]
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/dports/devel/sccache/sccache-0.2.15/cargo-crates/blake3-0.3.7/c/ |
H A D | blake3_avx2.c | 47 v[0] = addv(v[0], v[4]); in round_fn() 48 v[1] = addv(v[1], v[5]); in round_fn() 49 v[2] = addv(v[2], v[6]); in round_fn() 50 v[3] = addv(v[3], v[7]); in round_fn() 59 v[8] = addv(v[8], v[12]); in round_fn() 60 v[9] = addv(v[9], v[13]); in round_fn() 75 v[0] = addv(v[0], v[4]); in round_fn() 76 v[1] = addv(v[1], v[5]); in round_fn() 77 v[2] = addv(v[2], v[6]); in round_fn() 78 v[3] = addv(v[3], v[7]); in round_fn() [all …]
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/dports/finance/chiapos/chiapos-1.0.3/src/b3/ |
H A D | blake3_avx2.c | 47 v[0] = addv(v[0], v[4]); in round_fn() 48 v[1] = addv(v[1], v[5]); in round_fn() 49 v[2] = addv(v[2], v[6]); in round_fn() 50 v[3] = addv(v[3], v[7]); in round_fn() 59 v[8] = addv(v[8], v[12]); in round_fn() 60 v[9] = addv(v[9], v[13]); in round_fn() 75 v[0] = addv(v[0], v[4]); in round_fn() 76 v[1] = addv(v[1], v[5]); in round_fn() 77 v[2] = addv(v[2], v[6]); in round_fn() 78 v[3] = addv(v[3], v[7]); in round_fn() [all …]
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/dports/devel/pijul/pijul-1.0.0.a55/cargo-crates/blake3-1.0.0/c/ |
H A D | blake3_avx2.c | 47 v[0] = addv(v[0], v[4]); in round_fn() 48 v[1] = addv(v[1], v[5]); in round_fn() 49 v[2] = addv(v[2], v[6]); in round_fn() 50 v[3] = addv(v[3], v[7]); in round_fn() 59 v[8] = addv(v[8], v[12]); in round_fn() 60 v[9] = addv(v[9], v[13]); in round_fn() 75 v[0] = addv(v[0], v[4]); in round_fn() 76 v[1] = addv(v[1], v[5]); in round_fn() 77 v[2] = addv(v[2], v[6]); in round_fn() 78 v[3] = addv(v[3], v[7]); in round_fn() [all …]
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/dports/sysutils/czkawka/czkawka-3.3.1/cargo-crates/blake3-1.2.0/c/ |
H A D | blake3_avx2.c | 47 v[0] = addv(v[0], v[4]); in round_fn() 48 v[1] = addv(v[1], v[5]); in round_fn() 49 v[2] = addv(v[2], v[6]); in round_fn() 50 v[3] = addv(v[3], v[7]); in round_fn() 59 v[8] = addv(v[8], v[12]); in round_fn() 60 v[9] = addv(v[9], v[13]); in round_fn() 75 v[0] = addv(v[0], v[4]); in round_fn() 76 v[1] = addv(v[1], v[5]); in round_fn() 77 v[2] = addv(v[2], v[6]); in round_fn() 78 v[3] = addv(v[3], v[7]); in round_fn() [all …]
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/dports/games/fillets-ng/fillets-ng-data-1.0.1/script/electromagnet/ |
H A D | code.lua | 23 addv(20, "init-0") 25 addv(16, "init-2") 27 addv(16, "init-4") 46 addv(16, "rand-1-1") 48 addv(16, "rand-1-3") 58 addv(0, "rand-3-0") 64 addv(0, "rand-4-0") 69 addv(0, "rand-5-0") 94 addv(12,"shoot-1") 96 addv(12,"shoot-3-"..random(2)) [all …]
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/dports/games/fillets-ng/fillets-ng-data-1.0.1/script/hanoi/ |
H A D | code.lua | 30 addv(0, "v-bavit") 35 addv(0, "v-budou") 41 addv(0, "v-looser") 51 addv(0, "v-bavit") 56 addv(0, "v-budou") 61 addv(0, "v-looser") 72 addv(0, "v-looser") 82 addv(0, "v-budou") 87 addv(0, "v-looser") 152 addv(0, "v-tady") [all …]
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