| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/Mips/msa/ |
| H A D | set-msa-directive.s | 4 # CHECK: addvi.b $w14, $w12, 14
5 # CHECK: addvi.h $w26, $w17, 4
6 # CHECK: addvi.w $w19, $w13, 11
7 # CHECK: addvi.d $w16, $w19, 7
14 addvi.b $w14, $w12, 14
15 addvi.h $w26, $w17, 4
16 addvi.w $w19, $w13, 11
17 addvi.d $w16, $w19, 7
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Mips/msa/ |
| H A D | i5-a.ll | 13 %1 = tail call <16 x i8> @llvm.mips.addvi.b(<16 x i8> %0, i32 14)
18 declare <16 x i8> @llvm.mips.addvi.b(<16 x i8>, i32) nounwind
22 ; CHECK: addvi.b
32 %1 = tail call <8 x i16> @llvm.mips.addvi.h(<8 x i16> %0, i32 14)
37 declare <8 x i16> @llvm.mips.addvi.h(<8 x i16>, i32) nounwind
41 ; CHECK: addvi.h
51 %1 = tail call <4 x i32> @llvm.mips.addvi.w(<4 x i32> %0, i32 14)
56 declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32) nounwind
60 ; CHECK: addvi.w
75 declare <2 x i64> @llvm.mips.addvi.d(<2 x i64>, i32) nounwind
[all …]
|