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Searched refs:app_base (Results 1 – 25 of 109) sorted by relevance

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/dports/www/flexget/Flexget-3.2.18/flexget/ui/v1/
H A D__init__.py14 app_base = None variable
39 if not app_base:
42 return send_from_directory(app_base, path)
53 if not app_base:
68 global manager, app_base, debug
76 if not os.path.exists(app_base):
82 app_base = None
84 if not app_base:
85 app_base = ui_dist
86 if not os.path.exists(app_base):
[all …]
/dports/misc/vxl/vxl-3.3.2/contrib/brl/bseg/boxm2/vecf/tests/
H A Dtest_eye.cxx89 …boxm2_data_base * app_base = boxm2_cache::instance()->get_data_base(eye_scene,*iter_blk,boxm2_da… in test_eye()
90 app_base->enable_write(); in test_eye()
91 …REY>* app_data=new boxm2_data<BOXM2_MOG3_GREY>(app_base->data_buffer(),app_base->buffer_length(),a… in test_eye()
97 …boxm2_data_base * app_base = boxm2_cache::instance()->get_data_base(eye_scene,*iter_blk,boxm2_da… in test_eye()
98 app_base->enable_write(); in test_eye()
99 …RGB>* app_data=new boxm2_data<BOXM2_GAUSS_RGB>(app_base->data_buffer(),app_base->buffer_length(),a… in test_eye()
/dports/net-p2p/bitmark-recorder/bitmarkd-0.13.3/debian/
H A Drules24 app_base=$$(basename "$${app}") ; \
25 conf="${SRC_DIR}/$${app}/$${app_base}.conf.sample" ; \
26 [ -f "$${conf}" ] && cp -p "$${conf}" "$${etc_dir}/$${app_base}.conf.sample" || true ; \
27 subconf="${SRC_DIR}/$${app}/$${app_base}.conf.sub" ; \
29 [ -f "$${subconf}" ] && cp -p "$${subconf}" "$${etc_dir}/$${app_base}.conf.sub" || true ; \
/dports/net-p2p/bitmark-cli/bitmarkd-0.13.3/debian/
H A Drules24 app_base=$$(basename "$${app}") ; \
25 conf="${SRC_DIR}/$${app}/$${app_base}.conf.sample" ; \
26 [ -f "$${conf}" ] && cp -p "$${conf}" "$${etc_dir}/$${app_base}.conf.sample" || true ; \
27 subconf="${SRC_DIR}/$${app}/$${app_base}.conf.sub" ; \
29 [ -f "$${subconf}" ] && cp -p "$${subconf}" "$${etc_dir}/$${app_base}.conf.sub" || true ; \
/dports/net-p2p/bitmark/bitmarkd-0.13.3/debian/
H A Drules24 app_base=$$(basename "$${app}") ; \
25 conf="${SRC_DIR}/$${app}/$${app_base}.conf.sample" ; \
26 [ -f "$${conf}" ] && cp -p "$${conf}" "$${etc_dir}/$${app_base}.conf.sample" || true ; \
27 subconf="${SRC_DIR}/$${app}/$${app_base}.conf.sub" ; \
29 [ -f "$${subconf}" ] && cp -p "$${subconf}" "$${etc_dir}/$${app_base}.conf.sub" || true ; \
/dports/net-p2p/bitmark-daemon/bitmarkd-0.13.3/debian/
H A Drules24 app_base=$$(basename "$${app}") ; \
25 conf="${SRC_DIR}/$${app}/$${app_base}.conf.sample" ; \
26 [ -f "$${conf}" ] && cp -p "$${conf}" "$${etc_dir}/$${app_base}.conf.sample" || true ; \
27 subconf="${SRC_DIR}/$${app}/$${app_base}.conf.sub" ; \
29 [ -f "$${subconf}" ] && cp -p "$${subconf}" "$${etc_dir}/$${app_base}.conf.sub" || true ; \
/dports/misc/vxl/vxl-3.3.2/contrib/brl/bseg/boxm2/vecf/
H A Dtest_shuttle.cxx58 …boxm2_data_base * app_base = boxm2_cache::instance()->get_data_base(sts_scene,*iter_blk,boxm2_da… in test_shuttle()
59 app_base->enable_write(); in test_shuttle()
60 …app_data_=new boxm2_data<BOXM2_MOG3_GREY>(app_base->data_buffer(),app_base->buffer_length(),app_ba… in test_shuttle()
72 datas.push_back(alpha_base); datas.push_back(app_base); datas.push_back(nobs_base); in test_shuttle()
/dports/www/p5-Bigtop/Bigtop-0.38/t/gantry/
H A D05_cgi.t38 location `/app_base`;
86 '/app_base' => 'Apps::Checkbook',
87 '/app_base/payee' => 'Apps::Checkbook::PayeeOr',
126 '/app_base' => 'Apps::Checkbook',
127 '/app_base/payee' => 'Apps::Checkbook::PayeeOr',
189 '/app_base' => 'Apps::Checkbook',
190 '/app_base/payee' => 'Apps::Checkbook::PayeeOr',
238 '/app_base' => 'Apps::Checkbook',
372 location `/app_base`;
415 '/app_base' => 'Apps::Checkbook',
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/pci/controller/dwc/
H A Dpcie-spear13xx.c26 void __iomem *app_base; member
72 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_start_link()
86 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_irq_handler()
105 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_enable_interrupts()
116 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_link_up()
131 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_host_init()
H A Dpcie-intel-gw.c65 void __iomem *app_base; member
86 writel(val, lpp->app_base + ofs); in pcie_app_wr()
92 pcie_update_bits(lpp->app_base, ofs, mask, val); in pcie_app_wr_mask()
234 lpp->app_base = devm_platform_ioremap_resource_byname(pdev, "app"); in intel_pcie_get_resources()
235 if (IS_ERR(lpp->app_base)) in intel_pcie_get_resources()
236 return PTR_ERR(lpp->app_base); in intel_pcie_get_resources()
263 ret = readl_poll_timeout(lpp->app_base + PCIE_APP_PMC, value, in intel_pcie_wait_l2()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/pci/controller/dwc/
H A Dpcie-spear13xx.c26 void __iomem *app_base; member
72 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_start_link()
86 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_irq_handler()
105 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_enable_interrupts()
116 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_link_up()
131 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_host_init()
H A Dpcie-intel-gw.c65 void __iomem *app_base; member
86 writel(val, lpp->app_base + ofs); in pcie_app_wr()
92 pcie_update_bits(lpp->app_base, ofs, mask, val); in pcie_app_wr_mask()
234 lpp->app_base = devm_platform_ioremap_resource_byname(pdev, "app"); in intel_pcie_get_resources()
235 if (IS_ERR(lpp->app_base)) in intel_pcie_get_resources()
236 return PTR_ERR(lpp->app_base); in intel_pcie_get_resources()
263 ret = readl_poll_timeout(lpp->app_base + PCIE_APP_PMC, value, in intel_pcie_wait_l2()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/pci/controller/dwc/
H A Dpcie-spear13xx.c26 void __iomem *app_base; member
72 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_start_link()
86 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_irq_handler()
105 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_enable_interrupts()
116 struct pcie_app_reg *app_reg = spear13xx_pcie->app_base; in spear13xx_pcie_link_up()
131 spear13xx_pcie->app_base = pci->dbi_base + 0x2000; in spear13xx_pcie_host_init()
H A Dpcie-intel-gw.c65 void __iomem *app_base; member
86 writel(val, lpp->app_base + ofs); in pcie_app_wr()
92 pcie_update_bits(lpp->app_base, ofs, mask, val); in pcie_app_wr_mask()
234 lpp->app_base = devm_platform_ioremap_resource_byname(pdev, "app"); in intel_pcie_get_resources()
235 if (IS_ERR(lpp->app_base)) in intel_pcie_get_resources()
236 return PTR_ERR(lpp->app_base); in intel_pcie_get_resources()
263 ret = readl_poll_timeout(lpp->app_base + PCIE_APP_PMC, value, in intel_pcie_wait_l2()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/pci/
H A Dpcie_dw_ti.c65 void *app_base; member
152 val = readl(pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
154 writel(val, pci->app_base + PCIE_CMD_STATUS); in pcie_dw_ti_pcie_link_up()
336 pcie->app_base = (void *)dev_read_addr_name(dev, "app"); in pcie_dw_ti_of_to_plat()
337 if ((fdt_addr_t)pcie->app_base == FDT_ADDR_T_NONE) in pcie_dw_ti_of_to_plat()

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