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Searched refs:arith_insn (Results 1 – 25 of 65) sorted by relevance

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/dports/misc/adios2/ADIOS2-2.7.1/thirdparty/dill/dill/
H A Darm5.ops10 &arith_insn("add", "i u ul l p", "arm5_dproc", "ADD", "0");
11 &arith_insn("sub", "i u ul l p", "arm5_dproc", "SUB", "0");
12 &arith_insn("mul", "u ul", "arm5_mul", "1", "0");
13 &arith_insn("mul", "i l", "arm5_mul", "0", "0");
14 &arith_insn("div", "u ul", "arm5_div", "1", 0);
15 &arith_insn("div", "i l", "arm5_div", "0", 0);
29 &arith_insn("add", "f", "arm5_fproc", "0x0", "0x0");
30 &arith_insn("add", "d", "arm5_fproc", "0x0", "0x1");
31 &arith_insn("sub", "f", "arm5_fproc", "0x4", "0x0");
32 &arith_insn("sub", "d", "arm5_fproc", "0x4", "0x1");
[all …]
H A Dsparc.ops10 &arith_insn("add", "i u ul l p", "sparc_FORM3_arith", "0x0", "0");
11 &arith_insn("sub", "i u ul l p", "sparc_FORM3_arith", "0x4", "0");
12 &arith_insn("mul", "u ul", "sparc_FORM3_arith", "0x9/*umul*/", "0");
13 &arith_insn("mul", "i l", "sparc_FORM3_arith", "0x9/*smul*/", "0");
28 &arith_insn("lsh", "i u", "sparc_FORM3_arith", "0x25", "0");
29 &arith_insn("lsh", "ul l", "sparc_FORM3_arith", "0x25", "1");
30 &arith_insn("rsh", "i", "sparc_FORM3_arith", "0x27", "0");
31 &arith_insn("rsh", "l", "sparc_FORM3_arith", "0x27", "1");
32 &arith_insn("rsh", "u", "sparc_FORM3_arith", "0x26", "0");
33 &arith_insn("rsh", "ul", "sparc_FORM3_arith", "0x26", "1");
[all …]
H A Dpowerpc.ops10 &arith_insn("add", "i u ul l p", "powerpc_FORM3_arith", "0x0", "0");
11 &arith_insn("sub", "i u ul l p", "powerpc_FORM3_arith", "0x4", "0");
12 &arith_insn("mul", "u ul", "powerpc_FORM3_arith", "0x9/*umul*/", "0");
13 &arith_insn("mul", "i l", "powerpc_FORM3_arith", "0x9/*smul*/", "0");
28 &arith_insn("lsh", "i u", "powerpc_FORM3_arith", "0x25", "0");
29 &arith_insn("lsh", "ul l", "powerpc_FORM3_arith", "0x25", "1");
30 &arith_insn("rsh", "i", "powerpc_FORM3_arith", "0x27", "0");
31 &arith_insn("rsh", "l", "powerpc_FORM3_arith", "0x27", "1");
32 &arith_insn("rsh", "u", "powerpc_FORM3_arith", "0x26", "0");
33 &arith_insn("rsh", "ul", "powerpc_FORM3_arith", "0x26", "1");
[all …]
H A Dppc64le.ops16 &arith_insn("div", "i", "ppc64le_div", "491/*divw*/", 0);
17 &arith_insn("div", "l", "ppc64le_div", "489/*divd*/", 1);
19 &arith_insn("mod", "u", "ppc64le_mod", "0", 0);
20 &arith_insn("mod", "ul", "ppc64le_mod", "0", 1);
21 &arith_insn("mod", "i", "ppc64le_mod", "1", 0);
22 &arith_insn("mod", "l", "ppc64le_mod", "1", 1);
32 &arith_insn("add", "f", "ppc64le_farith", "60", "0");
33 &arith_insn("add", "d", "ppc64le_farith", "60", "96");
34 &arith_insn("sub", "f", "ppc64le_farith", "60", "8");
35 &arith_insn("sub", "d", "ppc64le_farith", "60", "40");
[all …]
H A Darm8.ops10 &arith_insn("add", "i u ul l p", "arm8_dproc", "ADD", "0");
11 &arith_insn("sub", "i u ul l p", "arm8_dproc", "SUB", "0");
12 &arith_insn("mul", "u ul", "arm8_mul", "1", "0");
13 &arith_insn("mul", "i l", "arm8_mul", "0", "0");
14 &arith_insn("div", "u ul", "arm8_div", "1", 0);
15 &arith_insn("div", "i l", "arm8_div", "0", 0);
29 &arith_insn("add", "f", "arm8_fproc", "0x6", "0x0");
30 &arith_insn("add", "d", "arm8_fproc", "0x6", "0x1");
31 &arith_insn("sub", "f", "arm8_fproc", "0x7", "0x0");
32 &arith_insn("sub", "d", "arm8_fproc", "0x7", "0x1");
[all …]
H A Darm6.ops10 &arith_insn("add", "i u ul l p", "arm6_dproc", "ADD", "0");
11 &arith_insn("sub", "i u ul l p", "arm6_dproc", "SUB", "0");
12 &arith_insn("mul", "u ul", "arm6_mul", "1", "0");
13 &arith_insn("mul", "i l", "arm6_mul", "0", "0");
14 &arith_insn("div", "u ul", "arm6_div", "1", 0);
15 &arith_insn("div", "i l", "arm6_div", "0", 0);
29 &arith_insn("add", "f", "arm6_fproc", "0x6", "0x0");
30 &arith_insn("add", "d", "arm6_fproc", "0x6", "0x1");
31 &arith_insn("sub", "f", "arm6_fproc", "0x7", "0x0");
32 &arith_insn("sub", "d", "arm6_fproc", "0x7", "0x1");
[all …]
H A Dia64.ops10 &arith_insn("add", "i u ul l p", "ia64_arith3", "0", "0");
11 &arith_insn("sub", "i u ul l p", "ia64_arith3", "1", "1");
16 &arith_insn("and", "i u ul l", "ia64_arith3", "3", "0");
17 &arith_insn("or", "i u ul l", "ia64_arith3", "3", "2");
24 &arith_insn("add", "f", "ia64_farith", "0x8", "1");
25 &arith_insn("add", "d", "ia64_farith", "0x9", "0");
26 &arith_insn("sub", "f", "ia64_farith", "0xa", "1");
27 &arith_insn("sub", "d", "ia64_farith", "0xb", "0");
28 &arith_insn("mul", "f", "ia64_farith", "0x18", "1");
29 &arith_insn("mul", "d", "ia64_farith", "0x19", "0");
[all …]
H A Dx86.ops18 &arith_insn("and", "i u ul l", "x86_arith3", "0x23", "1");
19 &arith_insn("or", "i u ul l", "x86_arith3", "0x0b", "1");
20 &arith_insn("xor", "i u ul l", "x86_arith3", "0x33", "1");
24 &arith_insn("lsh", "i u ul l", "x86_shift", "0x4", "2");
25 &arith_insn("rsh", "i l", "x86_shift", "0x7", "2");
26 &arith_insn("rsh", "u ul", "x86_shift", "0x5", "2");
27 &arith_insn("add", "f d", "x86_farith", "0", "DILL_t");
28 &arith_insn("sub", "f d", "x86_farith", "1", "DILL_t");
29 &arith_insn("mul", "f d", "x86_farith", "2", "DILL_t");
30 &arith_insn("div", "f d", "x86_farith", "3", "DILL_t");
[all …]
H A Dx86_64.ops10 &arith_insn("add", "i u ul l p", "x86_64_arith3", "0x03", "T");
11 &arith_insn("sub", "i u ul l p", "x86_64_arith3", "0x2b", "T");
14 &arith_insn("div", "u ul i l", "x86_64_div_mod", "1", "T");
15 &arith_insn("mod", "u ul i l", "x86_64_div_mod", "0", "T");
23 &arith_insn("rsh", "i l", "x86_64_shift", "0x7", "T");
24 &arith_insn("rsh", "u ul", "x86_64_shift", "0x5", "T");
25 &arith_insn("add", "f d", "x86_64_farith", "0x58", "T");
26 &arith_insn("sub", "f d", "x86_64_farith", "0x5c", "T");
27 &arith_insn("mul", "f d", "x86_64_farith", "0x59", "T");
28 &arith_insn("div", "f d", "x86_64_farith", "0x5e", "T");
[all …]
H A Dvirtual.ops12 &arith_insn("add sub", "i u ul l p", "dill_varith3");
13 &arith_insn("mul div mod and or xor lsh rsh", "u ul i l", "dill_varith3");
14 &arith_insn("add sub mul div", "f d", "dill_varith3");
148 sub arith_insn {
/dports/java/openjdk11/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/sparc/
H A DnativeInst_sparc.hpp215 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
218 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
230 static int data32(int sethi_insn, int arith_insn) { in data32() argument
233 int lo = get_simm13(arith_insn); in data32()
244 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
245 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
247 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk13/jdk13u-jdk-13.0.10-1-1/src/hotspot/cpu/sparc/
H A DnativeInst_sparc.hpp215 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
218 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
230 static int data32(int sethi_insn, int arith_insn) { in data32() argument
233 int lo = get_simm13(arith_insn); in data32()
244 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
245 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
247 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk11-jre/jdk11u-jdk-11.0.13-8-1/src/hotspot/cpu/sparc/
H A DnativeInst_sparc.hpp215 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
218 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
230 static int data32(int sethi_insn, int arith_insn) { in data32() argument
233 int lo = get_simm13(arith_insn); in data32()
244 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
245 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
247 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk12/openjdk-jdk12u-jdk-12.0.2-10-4/src/hotspot/cpu/sparc/
H A DnativeInst_sparc.hpp215 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
218 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
230 static int data32(int sethi_insn, int arith_insn) { in data32() argument
233 int lo = get_simm13(arith_insn); in data32()
244 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
245 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
247 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk14/jdk14u-jdk-14.0.2-12-1/src/hotspot/cpu/sparc/
H A DnativeInst_sparc.hpp215 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
218 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
230 static int data32(int sethi_insn, int arith_insn) { in data32() argument
233 int lo = get_simm13(arith_insn); in data32()
244 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
245 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
247 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk8/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/sparc/vm/
H A DnativeInst_sparc.hpp243 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
246 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
258 static int data32(int sethi_insn, int arith_insn) { in data32() argument
261 int lo = get_simm13(arith_insn); in data32()
272 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
273 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
275 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/java/openjdk8-jre/jdk8u-jdk8u312-b07.1/hotspot/src/cpu/sparc/vm/
H A DnativeInst_sparc.hpp243 static intptr_t data64( address pc, int arith_insn ) { in data64() argument
246 intptr_t lo = (intptr_t)get_simm13(arith_insn); in data64()
258 static int data32(int sethi_insn, int arith_insn) { in data32() argument
261 int lo = get_simm13(arith_insn); in data32()
272 static int set_data32_simm13(int arith_insn, int imm) { in set_data32_simm13() argument
273 get_simm13(arith_insn); // tickle the assertion check in set_data32_simm13()
275 return (arith_insn &~ Assembler::simm(-1, 13)) | Assembler::simm(imm10, 13); in set_data32_simm13()
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/yasm/source/patched-yasm/
H A Dx86insn_gas.gperf16 adc, arith_insn, 22, SUF_Z, 0x10, 0x02, 0, 0, 0, 0, 0
17 adcb, arith_insn, 22, SUF_B, 0x10, 0x02, 0, 0, 0, 0, 0
18 adcl, arith_insn, 22, SUF_L, 0x10, 0x02, 0, 0, CPU_386, 0, 0
19 adcq, arith_insn, 22, SUF_Q, 0x10, 0x02, 0, ONLY_64, 0, 0, 0
20 adcw, arith_insn, 22, SUF_W, 0x10, 0x02, 0, 0, 0, 0, 0
24 add, arith_insn, 22, SUF_Z, 0x00, 0x00, 0, 0, 0, 0, 0
25 addb, arith_insn, 22, SUF_B, 0x00, 0x00, 0, 0, 0, 0, 0
37 addw, arith_insn, 22, SUF_W, 0x00, 0x00, 0, 0, 0, 0, 0
48 and, arith_insn, 22, SUF_Z, 0x20, 0x04, 0, 0, 0, 0, 0
49 andb, arith_insn, 22, SUF_B, 0x20, 0x04, 0, 0, 0, 0, 0
[all …]
/dports/devel/yasm/yasm-1.3.0/
H A Dx86insn_gas.gperf16 adc, arith_insn, 22, SUF_Z, 0x10, 0x02, 0, 0, 0, 0, 0
17 adcb, arith_insn, 22, SUF_B, 0x10, 0x02, 0, 0, 0, 0, 0
18 adcl, arith_insn, 22, SUF_L, 0x10, 0x02, 0, 0, CPU_386, 0, 0
19 adcq, arith_insn, 22, SUF_Q, 0x10, 0x02, 0, ONLY_64, 0, 0, 0
20 adcw, arith_insn, 22, SUF_W, 0x10, 0x02, 0, 0, 0, 0, 0
24 add, arith_insn, 22, SUF_Z, 0x00, 0x00, 0, 0, 0, 0, 0
25 addb, arith_insn, 22, SUF_B, 0x00, 0x00, 0, 0, 0, 0, 0
37 addw, arith_insn, 22, SUF_W, 0x00, 0x00, 0, 0, 0, 0, 0
48 and, arith_insn, 22, SUF_Z, 0x20, 0x04, 0, 0, 0, 0, 0
49 andb, arith_insn, 22, SUF_B, 0x20, 0x04, 0, 0, 0, 0, 0
[all …]
/dports/misc/adios2/ADIOS2-2.7.1/thirdparty/ffs/ffs/cod/tests/
H A Dgeneral.ops21 &arith_insn("% & | ^ << >>", "c uc s us i u ul l");
22 &arith_insn("+ - * /", "c uc s us i u ul l f d");
65 sub arith_insn {
/dports/misc/adios2/ADIOS2-2.7.1/thirdparty/dill/dill/vtests/
H A Dgeneral.ops25 &arith_insn("add sub mul div mod and or xor lsh rsh", "+ - * / % & | ^ << >>", "i u ul l");
27 &arith_insn("add sub mul div", "+ - * /", "$FT $DT");
54 sub arith_insn {
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/
H A Dcompare-elim.c601 can_merge_compare_into_arith (rtx_insn *cmp_insn, rtx_insn *arith_insn) in can_merge_compare_into_arith() argument
604 insn && insn != arith_insn; in can_merge_compare_into_arith()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/
H A Dcompare-elim.c601 can_merge_compare_into_arith (rtx_insn *cmp_insn, rtx_insn *arith_insn) in can_merge_compare_into_arith() argument
604 insn && insn != arith_insn; in can_merge_compare_into_arith()
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/
H A Dcompare-elim.c601 can_merge_compare_into_arith (rtx_insn *cmp_insn, rtx_insn *arith_insn) in can_merge_compare_into_arith() argument
604 insn && insn != arith_insn; in can_merge_compare_into_arith()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/
H A Dcompare-elim.c601 can_merge_compare_into_arith (rtx_insn *cmp_insn, rtx_insn *arith_insn) in can_merge_compare_into_arith() argument
604 insn && insn != arith_insn; in can_merge_compare_into_arith()

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