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Searched refs:assign_vue_slot (Results 1 – 11 of 11) sorted by relevance

/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/lang/clover/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/
H A Dbrw_vue_map.c125 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
127 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
137 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
164 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
166 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
168 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
192 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
204 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/
H A Dbrw_vue_map.c124 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
125 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++); in brw_compute_vue_map()
126 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
135 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++); in brw_compute_vue_map()
136 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++); in brw_compute_vue_map()
163 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++); in brw_compute_vue_map()
165 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++); in brw_compute_vue_map()
167 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++); in brw_compute_vue_map()
191 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
203 assign_vue_slot(vue_map, varying, slot++); in brw_compute_vue_map()
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