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Searched refs:bcr1 (Results 1 – 25 of 240) sorted by relevance

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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/sh/drivers/pci/
H A Dfixups-se7751.c41 unsigned long bcr1, wcr1, wcr2, wcr3, mcr; in pci_fixup_pcic() local
51 bcr1 = (*(volatile unsigned long*)(SH7751_BCR1)); in pci_fixup_pcic()
58 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */ in pci_fixup_pcic()
59 (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1; in pci_fixup_pcic()
61 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
62 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */ in pci_fixup_pcic()
H A Dfixups-landisk.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
H A Dfixups-rts7751r2d.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/sh/drivers/pci/
H A Dfixups-se7751.c41 unsigned long bcr1, wcr1, wcr2, wcr3, mcr; in pci_fixup_pcic() local
51 bcr1 = (*(volatile unsigned long*)(SH7751_BCR1)); in pci_fixup_pcic()
58 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */ in pci_fixup_pcic()
59 (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1; in pci_fixup_pcic()
61 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
62 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */ in pci_fixup_pcic()
H A Dfixups-landisk.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
H A Dfixups-rts7751r2d.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/sh/drivers/pci/
H A Dfixups-se7751.c41 unsigned long bcr1, wcr1, wcr2, wcr3, mcr; in pci_fixup_pcic() local
51 bcr1 = (*(volatile unsigned long*)(SH7751_BCR1)); in pci_fixup_pcic()
58 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */ in pci_fixup_pcic()
59 (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1; in pci_fixup_pcic()
61 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
62 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */ in pci_fixup_pcic()
H A Dfixups-landisk.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
H A Dfixups-rts7751r2d.c41 unsigned long bcr1, mcr; in pci_fixup_pcic() local
43 bcr1 = __raw_readl(SH7751_BCR1); in pci_fixup_pcic()
44 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ in pci_fixup_pcic()
45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/ram/
H A Dstm32_sdram.c20 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
170 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
249 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/ram/
H A Dstm32_sdram.c20 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
170 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
249 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/ram/
H A Dstm32_sdram.c20 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
170 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
249 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/ram/
H A Dstm32_sdram.c20 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
170 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
249 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/ram/
H A Dstm32_sdram.c27 u32 bcr1; /* NOR/PSRAM Chip select control register 1 */ member
177 clrbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()
256 setbits_le32(&regs->bcr1, FMC_BCR1_FMCEN); in stm32_sdram_init()

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