/dports/cad/magic/magic-8.3.245/doc/tutcells/ |
H A D | tut11a.ext | 8 use tut11b bit_2 0 1 82 -1 0 -62 30 cap "GND" "bit_2" 1080 38 cap "bit_2/tut11d_0/Vdd" "bit_2/tut11d_0/reset_b" -316 39 cap "bit_2/tut11d_0/phi2" "bit_2/tut11d_0/Vdd" -316 40 cap "bit_2/tut11d_0/phi2_b" "bit_2/tut11d_0/Vdd" -316 47 cap "bit_2/tut11d_0/Vdd" "bit_2/tut11d_0/phi1" -316 49 cap "bit_2/tut11d_0/Vdd" "bit_2/tut11d_0/phi1_b" -316 59 cap "bit_2/a_n40_n60#" "bit_2/a_n18_n22#" -228 61 cap "bit_2/a_n18_n22#" "bit_2/a_n34_n41#" -1080 64 cap "bit_2/a_n18_n22#" "bit_2/a_n20_n60#" -228 [all …]
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H A D | tut11a.al | 6 = bit_2 bit_2/tut11d_0/B 7 = bit_2 bit_2/5_73_87# 8 = bit_2 bit_2/tut11d_0/Q_out 9 = bit_2/5_69_83# bit_2/tut11d_0/5_23_109# 21 = phi2_b bit_2/5_41_121# 25 = phi1 bit_2/tut11d_0/phi1 29 = phi1 bit_2/5_81_121# 51 = Vdd bit_2/tut11d_0/Vdd 52 = Vdd bit_2/5_37_45# 64 = GND bit_2/7_81_121# [all …]
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H A D | tut11a.sim | 60 p bit_2/tut11d_0/B_b bit_2/tut11d_0/a_26_n23# bit_2/tut11d_0/a_31_n39# 2 6 59 -92 g=S_Vdd! s=A_0,P_… 61 p bit_2 bit_2/tut11d_0/a_31_n39# bit_2/tut11d_0/a_39_n23# 2 6 59 -100 g=S_Vdd! s=A_0,P_0 d=A_12,P_16 65 n bit_2 bit_2/tut11d_0/a_26_n39# bit_2/tut11d_0/a_31_n39# 2 6 43 -92 g=S_GND s=A_0,P_0 d=A_66,P_82 81 n bit_2 bit_2/a_n34_n45# bit_2/a_n34_n41# 2 6 39 -29 g=S_GND s=A_12,P_16 d=A_0,P_0 113 C bit_2 Vdd 2.5 127 C bit_2 GND 10.0 133 C bit_2 bit_2/tut11d_0/a_31_n39# 2.5 144 C bit_2/tut11d_0/a_55_n47# bit_2 3.2 162 C bit_2/tut11d_0/a_77_n40# bit_2 2.2 215 C bit_2 GND 46.9 [all …]
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H A D | tut11a.nodes | 19 94 bit_2/5_69_91# 5550 -4350 green; 21 94 bit_2/tut11d_0/5_202_95# 5250 -24600 ndc; 24 94 bit_2/tut11d_0/5_110_95# 5250 -17700 ndc; 25 94 bit_2/tut11d_0/5_78_79# 6450 -15300 green; 26 94 bit_2/tut11d_0/5_52_79# 6450 -13350 green; 27 94 bit_2/tut11d_0/5_78_47# 8850 -15300 brown; 30 94 bit_2/tut11d_0/A 4500 -9450 green; 31 94 bit_2/tut11d_0/B_b 6450 -11100 ndc; 32 94 bit_2/tut11d_0/A_b 4500 -7050 ndc; 33 94 bit_2 7500 -29550 v; [all …]
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H A D | tut11a.mag | 75 use tut11b bit_2 97 rlabel metal2 52 -245 52 -245 5 bit_2
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H A D | tut11a.cmd | 5 vector bits bit_3 bit_2 bit_1 bit_0
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/dports/cad/ghdl/ghdl-1.0.0/testsuite/vests/vhdl-93/billowitch/compliant/ |
H A D | tc2161.vhd | 37 SUBTYPE bit_2 is bit_v (1 to 2); subtype 41 variable result : bit_2;
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/dports/net-im/cutegram/Cutegram-2.7.1-stable/Cutegram/asemantools/qml/AsemanTools/ |
H A D | CradleIndicator.qml | 37 id: bit_2
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/dports/net/mptsd/mptsd-1.1/libtsfuncs/ |
H A D | pes_es.c | 29 mpghdr->padding_bit = bit_on(d3, bit_2); // 1 bit in ts_pes_es_mpeg_audio_header_parse()
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H A D | tdt_desc.c | 100 lto[2 + 3] |= bit_2; // xxxxxx1x (Reserved, 1 bit) !!!! in ts_tot_set_localtime_offset()
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H A D | pes.c | 317 pes->copyright = bit_on(data[dpos], bit_2); in ts_pes_parse() 329 pes->pes_crc_flag = bit_on(data[dpos], bit_2); in ts_pes_parse()
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H A D | tsfuncs.h | 23 #define bit_2 (0x02) macro
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H A D | descs.c | 77 vs.constraint_parameter_flag = bit_on(data[0], bit_2); in ts_descriptor_dump()
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/dports/cad/yosys/yosys-yosys-0.12/backends/verilog/ |
H A D | verilog_backend.cc | 243 char bit_2 = bin_digits[i+2]; in dump_const() local 246 if (bit_3 == 'x' || bit_2 == 'x' || bit_1 == 'x' || bit_0 == 'x') { in dump_const() 247 if (bit_3 != 'x' || bit_2 != 'x' || bit_1 != 'x' || bit_0 != 'x') in dump_const() 252 if (bit_3 == 'z' || bit_2 == 'z' || bit_1 == 'z' || bit_0 == 'z') { in dump_const() 253 if (bit_3 != 'z' || bit_2 != 'z' || bit_1 != 'z' || bit_0 != 'z') in dump_const() 258 if (bit_3 == '?' || bit_2 == '?' || bit_1 == '?' || bit_0 == '?') { in dump_const() 259 if (bit_3 != '?' || bit_2 != '?' || bit_1 != '?' || bit_0 != '?') in dump_const() 264 int val = 8*(bit_3 - '0') + 4*(bit_2 - '0') + 2*(bit_1 - '0') + (bit_0 - '0'); in dump_const()
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/dports/cad/irsim/irsim-9.7.110/ |
H A D | README | 91 watchnode bit_2 100 vector bits bit_3 bit_2 bit_1 bit_0
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/dports/games/solarus-quest-editor/solarus-quest-editor-e541e1312c242bff10aa1fb84a7eb8b6cb8504ba/src/ |
H A D | auto_tiler.cpp | 106 int bit_2 = is_cell_occupied(cell_2) ? 1 : 0; in get_four_cells_mask() local 109 return bit_3 | (bit_2 << 1) | (bit_1 << 2) | (bit_0 << 3); in get_four_cells_mask()
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/dports/math/form/form-4.2.1/sources/ |
H A D | tools.c | 2046 case 2: return(set->bit_2); in set_in() 2067 case 2: set->bit_2=1;break; in set_set() 2088 case 2: set->bit_2=0;break; in set_del() 2112 case 2: set->bit_2=(set1->bit_2&&(!set2->bit_2));break; in set_sub()
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/dports/games/openrct2/OpenRCT2-0.3.5.1/src/openrct2/paint/tile_element/ |
H A D | Paint.Surface.cpp | 226 int32_t bit_2; member 1391 else if (surfaceShape & fenceData.bit_2) in PaintSurface()
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/dports/lang/erlang-runtime21/otp-OTP-21.3.8.24/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 422 {bit_2,
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/dports/lang/erlang-runtime23/otp-OTP-23.3.4.10/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 426 {bit_2,
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/dports/lang/erlang-runtime22/otp-OTP-22.3.4.24/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 424 {bit_2,
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/dports/lang/erlang-runtime24/otp-OTP-24.1.7/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 426 {bit_2,
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/dports/lang/erlang-wx/otp-OTP-24.1.7/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 426 {bit_2,
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/dports/lang/erlang/otp-OTP-24.1.7/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 426 {bit_2,
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/dports/lang/erlang-java/otp-OTP-24.1.7/lib/stdlib/test/ |
H A D | erl_pp_SUITE.erl | 426 {bit_2,
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