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Searched refs:blocking_targets_ (Results 1 – 2 of 2) sorted by relevance

/dports/cad/iverilog/verilog-11.0/tgt-vhdl/
H A Dvhdl_syntax.cc208 blocking_targets_.insert(ref->get_name()); in add_blocking_target()
213 return blocking_targets_.find(ref->get_name()) != blocking_targets_.end(); in is_blocking_target()
H A Dvhdl_syntax.hh837 set<string> blocking_targets_; member in vhdl_procedural