/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 70 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 71 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 78 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 96 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 133 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 134 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 112 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 159 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 221 brw_opcode_desc(devinfo, brw_inst_opcode(devinfo, inst)); in num_sources_from_inst() 224 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 385 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 638 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1086 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1519 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1764 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() [all …]
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/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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H A D | brw_eu_emit.c | 113 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_dest() 114 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) { in brw_set_dest() 221 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 222 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC || in brw_set_src0() 223 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src0() 235 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 352 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src1() 628 if (is_3src(devinfo, brw_inst_opcode(devinfo, insn)) && in brw_inst_set_state() 1696 if (brw_inst_opcode(devinfo, tmp) == BRW_OPCODE_ELSE) { in brw_ENDIF() 2915 switch (brw_inst_opcode(devinfo, insn)) { in brw_find_next_block_end() [all …]
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/dports/lang/clover/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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H A D | brw_eu_emit.c | 113 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_dest() 114 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) { in brw_set_dest() 221 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 222 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC || in brw_set_src0() 223 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src0() 235 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 352 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src1() 628 if (is_3src(devinfo, brw_inst_opcode(devinfo, insn)) && in brw_inst_set_state() 1696 if (brw_inst_opcode(devinfo, tmp) == BRW_OPCODE_ELSE) { in brw_ENDIF() 2915 switch (brw_inst_opcode(devinfo, insn)) { in brw_find_next_block_end() [all …]
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/dports/graphics/libosmesa/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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H A D | brw_eu_emit.c | 113 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_dest() 114 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) { in brw_set_dest() 221 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 222 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC || in brw_set_src0() 223 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src0() 235 (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND || in brw_set_src0() 352 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS || in brw_set_src1() 628 if (is_3src(devinfo, brw_inst_opcode(devinfo, insn)) && in brw_inst_set_state() 1696 if (brw_inst_opcode(devinfo, tmp) == BRW_OPCODE_ELSE) { in brw_ENDIF() 2915 switch (brw_inst_opcode(devinfo, insn)) { in brw_find_next_block_end() [all …]
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/dports/graphics/mesa-libs/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1090 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1523 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1768 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1975 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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/dports/graphics/mesa-dri/mesa-21.3.6/src/intel/compiler/ |
H A D | test_eu_compact.cpp | 95 if (brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SEND && in clear_pad_bits() 96 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits() 103 is_3src(devinfo, brw_inst_opcode(devinfo, inst))) { in clear_pad_bits() 121 if (is_3src(devinfo, brw_inst_opcode(devinfo, src))) { in skip_bit() 158 if (brw_inst_opcode(devinfo, src) != BRW_OPCODE_SEND && in skip_bit() 159 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
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H A D | brw_eu_validate.c | 95 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_send() 113 switch (brw_inst_opcode(devinfo, inst)) { in inst_is_split_send() 160 return brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MOV && in inst_is_raw_move() 227 if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in num_sources_from_inst() 388 switch (brw_inst_opcode(devinfo, inst)) { in inst_uses_src_acc() 641 unsigned opcode = brw_inst_opcode(devinfo, inst); in is_mixed_float() 1089 const unsigned opcode = brw_inst_opcode(devinfo, inst); in special_restrictions_for_mixed_float_mode() 1522 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MATH) { in region_alignment_rules() 1767 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL && in special_requirements_for_handling_double_precision_data_types() 1973 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_MUL) { in instruction_restrictions() [all …]
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