/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, v2, s[0:3], 0 offen glc 13 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v2, s[0:3], 0 offen offset:42 glc 17 ;SICI: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 18 ;VI: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 20 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}}
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H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, v2, s[0:3], 0 offen glc 13 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v2, s[0:3], 0 offen offset:42 glc 17 ;SICI: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 18 ;VI: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 20 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}}
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
|
H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}} 20 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}} 16 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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H A D | llvm.amdgcn.raw.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0 glc 9 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen glc 11 ;CHECK: buffer_atomic_swap v0, v1, s[0:3], 0 offen offset:42 glc 13 ;CHECK: buffer_atomic_swap v0, off, s[0:3], [[SOFS]] offset:4 glc 15 ;CHECK: buffer_atomic_swap v0, off, s[0:3], 0{{$}}
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.struct.buffer.atomic.ll | 6 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 8 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen glc 11 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 13 ;CHECK: buffer_atomic_swap v0, {{v\[[0-9]+:[0-9]+\]}}, s[0:3], 0 idxen offen glc 15 ;CHECK: buffer_atomic_swap v0, v[1:2], s[0:3], 0 idxen offen offset:42 glc 17 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], [[SOFS]] idxen offset:4 glc 19 ;CHECK: buffer_atomic_swap v0, {{v[0-9]+}}, s[0:3], 0 idxen{{$}}
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