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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
H A D	llvm.amdgcn.struct.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen 6 ;CHECK: buffer_load_format_xyzw v[4:7], {{v[0-9]+}}, s[0:3], 0 idxen glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], {{v[0-9]+}}, s[0:3], 0 idxen slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], {{v[0-9]+}}, s[0:3], 0 idxen offset:42 30 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 60 idxen offset:40… 34 ;CHECK-DAG: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], [[OFS2]] idxen off… 47 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 56 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen offset:60 75 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A D	llvm.amdgcn.buffer.load.format.ll	5 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 6 ;CHECK: buffer_load_format_xyzw v[4:7], off, s[0:3], 0 glc 7 ;CHECK: buffer_load_format_xyzw v[8:11], off, s[0:3], 0 slc 21 ;CHECK: buffer_load_format_xyzw v[0:3], off, s[0:3], 0 offset:42 31 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, [[VOFS]], s[0:3], 0 offen 32 ;SICI: buffer_load_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, s[0:3], 0 offen 65 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 idxen 74 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen 83 ;CHECK: buffer_load_format_xyzw v[0:3], v0, s[0:3], 0 offen offset:60 93 ;CHECK: buffer_load_format_xyzw v[0:3], v[0:1], s[0:3], 0 idxen offen [all …]

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