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/dports/devel/lattice-ice40-examples-hx1k/iCE40HX1K-EVB-69df5a7fc2daa8f00a984426b721499f6df22492/demo/ice40-io-video/
H A Dexample_2.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_3.v67 reg [9:0] c_ver; //visible frame register vertically register
115 c_ver <= 0;
127 if(c_ver < v_frame - 1) begin
128 c_ver <= c_ver + 1;
131 c_ver <= 0;
141 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
150 if(c_ver < v_pixels) begin
151 c_row <= c_ver;
153 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_0.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_1.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_4.v67 reg [9:0] c_ver; //visible frame register vertically register
144 c_ver <= 0;
156 if(c_ver < v_frame - 1) begin
157 c_ver <= c_ver + 1;
160 c_ver <= 0;
170 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
179 if(c_ver < v_pixels) begin
180 c_row <= c_ver;
182 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_5.v67 reg [9:0] c_ver; //visible frame register vertically register
144 c_ver <= 0;
156 if(c_ver < v_frame - 1) begin
157 c_ver <= c_ver + 1;
160 c_ver <= 0;
170 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
179 if(c_ver < v_pixels) begin
180 c_row <= c_ver;
182 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_6.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_7.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
/dports/devel/lattice-ice40-examples-hx8k/iCE40HX8K-EVB-ae283711fc6c18f1905d0abf78195aed191ce612/demo/ice40-io-video/
H A Dexample_0.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_2.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_3.v67 reg [9:0] c_ver; //visible frame register vertically register
115 c_ver <= 0;
127 if(c_ver < v_frame - 1) begin
128 c_ver <= c_ver + 1;
131 c_ver <= 0;
141 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
150 if(c_ver < v_pixels) begin
151 c_row <= c_ver;
153 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_1.v67 reg [9:0] c_ver; //visible frame register vertically register
166 c_ver <= 0;
178 if(c_ver < v_frame - 1) begin
179 c_ver <= c_ver + 1;
182 c_ver <= 0;
192 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
201 if(c_ver < v_pixels) begin
202 c_row <= c_ver;
204 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_5.v67 reg [9:0] c_ver; //visible frame register vertically register
144 c_ver <= 0;
156 if(c_ver < v_frame - 1) begin
157 c_ver <= c_ver + 1;
160 c_ver <= 0;
170 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
179 if(c_ver < v_pixels) begin
180 c_row <= c_ver;
182 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_4.v67 reg [9:0] c_ver; //visible frame register vertically register
144 c_ver <= 0;
156 if(c_ver < v_frame - 1) begin
157 c_ver <= c_ver + 1;
160 c_ver <= 0;
170 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
179 if(c_ver < v_pixels) begin
180 c_row <= c_ver;
182 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_6.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
H A Dexample_7.v67 reg [9:0] c_ver; //visible frame register vertically register
148 c_ver <= 0;
160 if(c_ver < v_frame - 1) begin
161 c_ver <= c_ver + 1;
164 c_ver <= 0;
174 if(c_ver < v_pixels + v_fp || c_ver > v_pixels + v_fp + v_pulse) begin //V-SYNC generator
183 if(c_ver < v_pixels) begin
184 c_row <= c_ver;
186 …if(c_hor < h_pixels && c_ver < v_pixels) begin //VGA color signals are enabled only in the visibl…
/dports/www/firefox-esr/firefox-91.8.0/security/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/security/ca_root_nss/nss-3.71/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/www/firefox/firefox-99.0/security/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/security/nss/nss-3.76.1/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/mail/thunderbird/thunderbird-91.8.0/security/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/lang/spidermonkey78/firefox-78.9.0/security/nss/gtests/ssl_gtest/
H A Dssl_version_unittest.cc116 c_ver(std::get<1>(GetParam())), in TlsDowngradeTest()
120 const uint16_t c_ver; member in nss_test::TlsDowngradeTest
131 if (c_ver > s_ver) { in TEST_P()
135 client_->SetVersionRange(c_ver, c_ver); in TEST_P()
136 server_->SetVersionRange(c_ver, s_ver); in TEST_P()
144 if (c_ver < s_ver) { in TEST_P()
145 if (c_ver == SSL_LIBRARY_VERSION_TLS_1_2) { in TEST_P()
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/gn/tools/gn/
H A Dqt_creator_writer.cc211 auto c_ver = kFlagToCVersion.find(flag); in ParseCompilerOption() local
212 if (c_ver != kFlagToCVersion.end()) in ParseCompilerOption()
213 options->SetCVersion(c_ver->second); in ParseCompilerOption()

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