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Searched refs:cellname (Results 1 – 25 of 164) sorted by relevance

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/dports/databases/grass7/grass-7.8.6/raster/r.terraflow/
H A Dgrass2str.h45 assert(cellname && nodata_count); in cell2stream()
60 infd = Rast_open_old (cellname, ""); in cell2stream()
64 data_type = Rast_map_type(cellname, ""); in cell2stream()
119 cellname, i, j, d); in cell2stream()
156 char* cellname, bool usefcell=false) {
174 outfd = Rast_open_new (cellname, mtype);
238 FUN fmt, char* cellname) { in stream2_CELL() argument
244 assert(str && cellname); in stream2_CELL()
258 outfd = Rast_open_new (cellname, CELL_TYPE); in stream2_CELL()
312 FUN fmt, char* cellname) { in stream2_FCELL() argument
[all …]
H A Dmain.cpp200 void check_header(char* cellname) { in check_header() argument
203 mapset = G_find_raster(cellname, ""); in check_header()
209 Rast_get_cellhd (cellname, mapset, &cell_hd); in check_header()
215 cellname); in check_header()
218 cellname); in check_header()
345 setFlowAccuColorTable(char* cellname) { in setFlowAccuColorTable() argument
350 mapset = G_find_raster(cellname, ""); in setFlowAccuColorTable()
375 Rast_write_colors(cellname, mapset, &colors); in setFlowAccuColorTable()
383 setSinkWatershedColorTable(char* cellname) { in setSinkWatershedColorTable() argument
388 mapset = G_find_raster(cellname, ""); in setSinkWatershedColorTable()
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/dports/cad/magic/magic-8.3.245/tcltk/
H A Dtoolkit_rev0.tcl65 set library [cellname property $gname library]
97 cellname property $gname $pname $value
127 if {[cellname list exists $gname] != 0} {
157 if {[cellname list exists $gname] == 0} {
158 cellname create $gname
192 cellname property $gname library $library
205 if {[cellname list exists $gname] != 0} {
206 set value [cellname property $gname $pname]
240 while {[cellname list exists ${gencell_type}_$pidx] != 0} {
250 set gencell_type [cellname property ${gname} gencell]
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H A Ddrcmgr.tcl206 proc magic::drc_save_report {{cellname ""} {outfile ""}} {
215 if {$cellname == ""} {
217 set cellname [cellname list self]
220 set origname [cellname list self]
221 puts stdout "loading $cellname\n"
224 load $cellname
231 puts $fout "$cellname $count"
/dports/cad/iverilog/verilog-11.0/tgt-fpga/
H A Dd-lpm.c558 char cellname[32]; in lpm_show_mux() local
574 sprintf(cellname, "Result%u", idx); in lpm_show_mux()
581 sprintf(cellname, "Sel%u", idx); in lpm_show_mux()
611 sprintf(cellname, "Result%u", idx); in lpm_show_mux()
621 sprintf(cellname, "Sel%u", idx); in lpm_show_mux()
645 char cellname[32]; in lpm_show_add() local
677 sprintf(cellname, "Result%u", idx); in lpm_show_add()
681 sprintf(cellname, "DataA%u", idx); in lpm_show_add()
685 sprintf(cellname, "DataB%u", idx); in lpm_show_add()
710 sprintf(cellname, "DataA%u", idx); in lpm_show_add()
[all …]
/dports/cad/padring/padring-b2a64ab/src/
H A Dpadringdb.h47 const std::string &cellname) override in onCorner() argument
49 PRLEFReader::LEFCellInfo_t *cell = m_lefreader.getCellByName(cellname); in onCorner()
52 doLog(LOG_ERROR,"Cannot find cell %s in the LEF database\n", cellname.c_str()); in onCorner()
58 item_x->m_cellname = cellname; in onCorner()
65 item_y->m_cellname = cellname; in onCorner()
102 const std::string &cellname, in onPad() argument
105 PRLEFReader::LEFCellInfo_t *cell = m_lefreader.getCellByName(cellname); in onPad()
108 doLog(LOG_ERROR,"Cannot find cell %s in the LEF database\n", cellname.c_str()); in onPad()
114 item->m_cellname = cellname; in onPad()
140 doLog(LOG_ERROR, "Incorrect location on PAD %s\n", cellname.c_str()); in onPad()
H A Dconfigreader.h84 const std::string &cellname) in onCorner() argument
86 std::cout << "CORNER " << instance << " " << location << " " << cellname << "\n"; in onCorner()
96 const std::string &cellname, in onPad() argument
99 std::cout << "PAD " << instance << " " << location << " " << cellname << "\n"; in onPad()
H A Dconfigreader.cpp289 std::string cellname; in parsePad() local
317 tok = tokenize(cellname); in parsePad()
318 if ((tok == TOK_IDENT) && (cellname == "FLIP")) in parsePad()
321 tok = tokenize(cellname); in parsePad()
340 onPad(instance,location,cellname,flipped); in parsePad()
356 std::string cellname; in parseCorner() local
383 tok = tokenize(cellname); in parseCorner()
398 onCorner(instance,location,cellname); in parseCorner()
/dports/editors/calligra/calligra-3.2.1/sheets/interfaces/
H A DSheetAdaptor.h57 virtual QPoint cellLocation(const QString& cellname);
60 virtual int cellRow(const QString& cellname);
63 virtual int cellColumn(const QString& cellname);
68 virtual QString text(const QString& cellname);
74 virtual bool setText(const QString& cellname, const QString& text, bool parse = true);
81 virtual QVariant value(const QString& cellname);
85 virtual bool setValue(const QString& cellname, const QVariant& value);
H A DSheetAdaptor.cpp80 int SheetAdaptor::cellRow(const QString& cellname) in cellRow() argument
82 return cellLocation(cellname).x(); in cellRow()
85 int SheetAdaptor::cellColumn(const QString& cellname) in cellColumn() argument
87 return cellLocation(cellname).y(); in cellColumn()
90 QPoint SheetAdaptor::cellLocation(const QString& cellname) in cellLocation() argument
104 QString SheetAdaptor::text(const QString& cellname) in text() argument
106 const QPoint location = cellLocation(cellname); in text()
126 const QPoint location = cellLocation(cellname); in setText()
175 QVariant SheetAdaptor::value(const QString& cellname) in value() argument
177 const QPoint location = cellLocation(cellname); in value()
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/dports/cad/xcircuit/xcircuit-3.10.30/lib/tcl/
H A Dedif.tcl393 set cellname [lindex $instinfo 1]
398 puts "Created instance $instName of $cellname"
540 proc parse_page {cellname portlist pagedata} {
546 page label $cellname
715 proc parse_interface {cellname ifacedata} {
745 proc parse_schematic {cellname viewdata} {
766 proc parse_symbol {libname cellname viewdata} {
769 catch {object [object handle $cellname] name "_$cellname"}
770 set handle [object make $cellname $libname -force]
806 if {[instance $inst object] == $cellname} {
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/dports/cad/netgen-lvs/netgen-1.5.211/base/
H A Dplace.c131 int RenumberNodes(char *cellname) in RenumberNodes() argument
138 tp = LookupCell(cellname); in RenumberNodes()
178 tp = LookupCell(cellname); in InitializeMatrices()
184 cellname, Nodes, MAX_NODES); in InitializeMatrices()
517 tp = LookupCell(cellname); in OpenEmbeddingFile()
576 tp = LookupCell(cellname); in EmbedCells()
602 void Embed(char *cellname) in Embed() argument
606 EmbedCells(cellname, greedy); in Embed()
624 tp = LookupCell(cellname); in CountSubGraphs()
683 tp = LookupCell(cellname); in NumberOfInstances()
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H A Dquery.c520 if (cellname == NULL) { in ChangeScope()
863 void PrintPortsInCell(char *cellname, int filenum) in PrintPortsInCell() argument
870 PrintPortsInCell(cellname, Circuit1->file); in PrintPortsInCell()
871 PrintPortsInCell(cellname, Circuit2->file); in PrintPortsInCell()
875 np = LookupCellFile(cellname, filenum); in PrintPortsInCell()
877 Printf("No circuit: %s\n",cellname); in PrintPortsInCell()
896 PrintLeavesInCell(cellname, Circuit1->file); in PrintLeavesInCell()
901 np = LookupCellFile(cellname, filenum); in PrintLeavesInCell()
903 Printf("No circuit: %s\n",cellname); in PrintLeavesInCell()
910 Printf("%s; %d ports; Primitive.\n", cellname, NumberOfPorts(cellname, filenum)); in PrintLeavesInCell()
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H A Dembed.h69 extern void PrintEmbeddingTree(FILE *outfile, char *cellname, int flatten);
76 extern void EmbedCell(char *cellname, char *filename); /* bottomup.c */
89 extern void TopDownEmbedCell(char *cellname, char *filename,
153 extern int InitializeMatrices(char *cellname);
154 extern int OpenEmbeddingFile(char *cellname, char *filename);
/dports/cad/qflow/qflow-1.4.98/scripts/
H A Dmakesim.sh19 set cellname=${argv[1]:t:r}
22 rm -f ${cellname}.ext
23 rm -f ${cellname}.sim
28 load ${cellname}
H A Drtl2sim.tcl.in19 set cellname [file rootname $rtlfile]
20 if {"$cellname" == "$rtlfile"} {
21 set rtlfile ${cellname}.rtl.v
41 set simfile ${cellname}.sim
68 if {"$cellname" != "$cellverify"} {
70 puts stderr " match filename ${cellname}!"
71 set cellname $cellverify
72 if {$argc != 3} {set simfile ${cellname}.sim}
191 if {"$cellname" != "$cellverify"} {
193 puts stderr " match filename ${cellname}!"
H A Dspi2xspice.py.in98 for cellname in cellsused:
99 cellrec = celldefs[cellname]
196 print('No output for ' + cellname)
291 cellname = conns[-1]
293 if cellname not in celldefs:
297 if cellname not in cellsused:
298 cellsused.append(cellname)
300 cellrec = celldefs[cellname]
738 cellname = lmatch.group(1).strip('"')
740 print("Found cell " + cellname)
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H A Dremoveblocks.tcl.in47 $line lmatch cellid cellname] {
48 lappend cellnames $cellname
107 if [regexp {^[ \t]*([^ \t]+)[ \t]+} $line lmatch cellname] {
108 if {[lsearch $cellnames $cellname] < 0} {
134 if [regexp {^[ \t]*([^ \t]+)[ \t]+} $line lmatch cellname] {
135 if {[lsearch $cellnames $cellname] < 0} {
H A Dannotate.tcl.in91 …([^ \t]+)[ \t]+Cell=([^ \t]+)[ \t]+Pin=([^ \t]+)} $line lmatch netname instname cellname pinname] {
95 dict set changelist $instname [list $netname $cellname $pinname]
132 set cellname [lindex $netchange 1]
135 puts $fvout "${cellname} ${instname} ( .${pinname}(${netname}) );"
137 puts $fvout "${cellname} ${instname} ( );"
H A Dblif2sim.tcl.in19 set cellname [file rootname $bliffile]
20 if {"$cellname" == "$bliffile"} {
21 set bliffile ${cellname}.blif
41 set simfile ${cellname}.sim
/dports/cad/netgen-lvs/netgen-1.5.211/netgen/
H A Dntk2xnf.c50 char cellname[200]; in main() local
61 STRCPY(cellname, ReadNetlist(argv[1], &filenum)); in main()
62 if (argc == 3) STRCPY(cellname, argv[2]); in main()
64 Xilinx(cellname, NULL); in main()
H A Dntk2adl.c48 char cellname[200]; in main() local
59 STRCPY(cellname, ReadNetlist(argv[1], &filenum)); in main()
60 if (argc == 3) STRCPY(cellname, argv[2]); in main()
62 Actel(cellname, NULL); in main()
/dports/cad/electric/electric-7.00/src/misc/
H A Dprojecttool.c223 efree(pf->cellname); in proj_done()
310 REGISTER CHAR *pp, *cellname; in proj_set() local
331 proj_addcell(cellname); in proj_set()
358 proj_checkin(cellname); in proj_set()
390 proj_deletecell(cellname); in proj_set()
589 np = getnodeproto(cellname); in proj_checkin()
956 np = getnodeproto(cellname); in proj_getoldversion()
1243 np = getnodeproto(cellname); in proj_addcell()
1438 efree(pf->cellname); in proj_deletecell()
2187 efree(pf->cellname); in proj_readprojectfile()
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/dports/cad/electric/electric-7.00/src/io/
H A Diovhdl.c88 CHAR *pt, *start, text[MAXCHARS], cellname[256], endtag[256]; in io_vhdlreadfile() local
133 estrcpy(cellname, start); in io_vhdlreadfile()
147 estrcpy(cellname, start); in io_vhdlreadfile()
154 if (namesame(cellname, storagecell->protoname) == 0 && in io_vhdlreadfile()
173 estrcat(cellname, x_("{vhdl}")); in io_vhdlreadfile()
174 storagecell = newnodeproto(cellname, lib); in io_vhdlreadfile()
177 ttyputerr(_("Could not create cell %s"), cellname); in io_vhdlreadfile()
/dports/devel/trellis/prjtrellis-5eb0ad87/timing/util/
H A Dcell_html.py7 def html_for_cell(cellname, cell, html): argument
38 print("<a name='{}'/>".format(cellname), file=html)
39 print("<h2>{}</h2>".format(cellname), file=html)
116 for cellname in sorted(db.keys()):
117 html_for_cell(cellname, db[cellname], html)

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