| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 148 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
176 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
186 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
357 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
367 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 148 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
176 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
186 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
357 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
367 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 148 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
176 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
186 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
357 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
367 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 148 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
176 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
186 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
357 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
367 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | fsl_lsch2_serdes.c | 150 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt() local
178 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
188 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
359 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; in setup_serdes_volt()
369 cfg_tmp = cfg_rcw4 & FSL_CHASSIS2_RCWSR4_SRDS2_PRTCL_MASK; in setup_serdes_volt()
|