Home
last modified time | relevance | path

Searched refs:clk_root_index (Results 1 – 25 of 605) sorted by relevance

12345678910>>...25

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/include/asm/arch-mx7/
H A Dclock_slice.h98 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src);
99 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src);
100 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div);
101 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div);
102 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div);
103 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div);
104 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div,
108 int clock_get_target_val(enum clk_root_index clock_id, u32 *val);
109 int clock_set_target_val(enum clk_root_index clock_id, u32 val);
110 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div,
[all …]

12345678910>>...25