| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/ |
| H A D | mmio.c | 12 struct clocksource clksrc; member
17 return container_of(c, struct clocksource_mmio, clksrc); in to_mmio_clksrc()
63 cs->clksrc.name = name; in clocksource_mmio_init()
64 cs->clksrc.rating = rating; in clocksource_mmio_init()
65 cs->clksrc.read = read; in clocksource_mmio_init()
66 cs->clksrc.mask = CLOCKSOURCE_MASK(bits); in clocksource_mmio_init()
67 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in clocksource_mmio_init()
69 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
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| H A D | timer-atmel-pit.c | 40 struct clocksource clksrc; member
49 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) in clksrc_to_pit_data() argument
51 return container_of(clksrc, struct pit_data, clksrc); in clksrc_to_pit_data()
221 data->clksrc.mask = CLOCKSOURCE_MASK(bits); in at91sam926x_pit_dt_init()
222 data->clksrc.name = "pit"; in at91sam926x_pit_dt_init()
223 data->clksrc.rating = 175; in at91sam926x_pit_dt_init()
224 data->clksrc.read = read_pit_clk; in at91sam926x_pit_dt_init()
225 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in at91sam926x_pit_dt_init()
227 ret = clocksource_register_hz(&data->clksrc, pit_rate); in at91sam926x_pit_dt_init()
239 clocksource_unregister(&data->clksrc); in at91sam926x_pit_dt_init()
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| H A D | timer-sun5i.c | 53 struct clocksource clksrc; member
57 container_of(x, struct sun5i_timer_clksrc, clksrc)
156 static u64 sun5i_clksrc_read(struct clocksource *clksrc) in sun5i_clksrc_read() argument
172 clocksource_unregister(&cs->clksrc); in sun5i_rate_cb_clksrc()
176 clocksource_register_hz(&cs->clksrc, ndata->new_rate); in sun5i_rate_cb_clksrc()
226 cs->clksrc.name = node->name; in sun5i_setup_clocksource()
227 cs->clksrc.rating = 340; in sun5i_setup_clocksource()
228 cs->clksrc.read = sun5i_clksrc_read; in sun5i_setup_clocksource()
229 cs->clksrc.mask = CLOCKSOURCE_MASK(32); in sun5i_setup_clocksource()
230 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in sun5i_setup_clocksource()
[all …]
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| H A D | timer-microchip-pit64b.c | 85 struct clocksource clksrc; member
90 struct mchp_pit64b_clksrc, clksrc))
353 cs->clksrc.name = MCHP_PIT64B_NAME; in mchp_pit64b_init_clksrc()
354 cs->clksrc.mask = CLOCKSOURCE_MASK(64); in mchp_pit64b_init_clksrc()
355 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in mchp_pit64b_init_clksrc()
356 cs->clksrc.rating = 210; in mchp_pit64b_init_clksrc()
357 cs->clksrc.read = mchp_pit64b_clksrc_read; in mchp_pit64b_init_clksrc()
358 cs->clksrc.suspend = mchp_pit64b_clksrc_suspend; in mchp_pit64b_init_clksrc()
359 cs->clksrc.resume = mchp_pit64b_clksrc_resume; in mchp_pit64b_init_clksrc()
361 ret = clocksource_register_hz(&cs->clksrc, clk_rate); in mchp_pit64b_init_clksrc()
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| H A D | timer-ti-dm-systimer.c | 716 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles()
731 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend()
733 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
741 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume()
749 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
756 struct dmtimer_clocksource *clksrc; in dmtimer_clocksource_init() local
761 clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL); in dmtimer_clocksource_init()
762 if (!clksrc) in dmtimer_clocksource_init()
765 dev = &clksrc->dev; in dmtimer_clocksource_init()
766 t = &clksrc->t; in dmtimer_clocksource_init()
[all …]
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| H A D | timer-atmel-tcb.c | 113 static struct clocksource clksrc = { variable
124 return tc_get_cycles(&clksrc); in tc_sched_clock_read()
129 return tc_get_cycles32(&clksrc); in tc_sched_clock_read32()
136 return tc_get_cycles(&clksrc); in tc_delay_timer_read()
141 return tc_get_cycles32(&clksrc); in tc_delay_timer_read32()
450 clksrc.name = kbasename(node->parent->full_name); in tcb_clksrc_init()
452 pr_debug("%s at %d.%03d MHz\n", clksrc.name, divided_rate / 1000000, in tcb_clksrc_init()
459 clksrc.read = tc_get_cycles32; in tcb_clksrc_init()
480 ret = clocksource_register_hz(&clksrc, divided_rate); in tcb_clksrc_init()
497 clocksource_unregister(&clksrc); in tcb_clksrc_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/ |
| H A D | mmio.c | 12 struct clocksource clksrc; member
17 return container_of(c, struct clocksource_mmio, clksrc); in to_mmio_clksrc()
63 cs->clksrc.name = name; in clocksource_mmio_init()
64 cs->clksrc.rating = rating; in clocksource_mmio_init()
65 cs->clksrc.read = read; in clocksource_mmio_init()
66 cs->clksrc.mask = CLOCKSOURCE_MASK(bits); in clocksource_mmio_init()
67 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in clocksource_mmio_init()
69 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
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| H A D | timer-atmel-pit.c | 40 struct clocksource clksrc; member
49 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) in clksrc_to_pit_data() argument
51 return container_of(clksrc, struct pit_data, clksrc); in clksrc_to_pit_data()
221 data->clksrc.mask = CLOCKSOURCE_MASK(bits); in at91sam926x_pit_dt_init()
222 data->clksrc.name = "pit"; in at91sam926x_pit_dt_init()
223 data->clksrc.rating = 175; in at91sam926x_pit_dt_init()
224 data->clksrc.read = read_pit_clk; in at91sam926x_pit_dt_init()
225 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in at91sam926x_pit_dt_init()
227 ret = clocksource_register_hz(&data->clksrc, pit_rate); in at91sam926x_pit_dt_init()
239 clocksource_unregister(&data->clksrc); in at91sam926x_pit_dt_init()
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| H A D | timer-sun5i.c | 53 struct clocksource clksrc; member
57 container_of(x, struct sun5i_timer_clksrc, clksrc)
156 static u64 sun5i_clksrc_read(struct clocksource *clksrc) in sun5i_clksrc_read() argument
172 clocksource_unregister(&cs->clksrc); in sun5i_rate_cb_clksrc()
176 clocksource_register_hz(&cs->clksrc, ndata->new_rate); in sun5i_rate_cb_clksrc()
226 cs->clksrc.name = node->name; in sun5i_setup_clocksource()
227 cs->clksrc.rating = 340; in sun5i_setup_clocksource()
228 cs->clksrc.read = sun5i_clksrc_read; in sun5i_setup_clocksource()
229 cs->clksrc.mask = CLOCKSOURCE_MASK(32); in sun5i_setup_clocksource()
230 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in sun5i_setup_clocksource()
[all …]
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| H A D | timer-microchip-pit64b.c | 85 struct clocksource clksrc; member
90 struct mchp_pit64b_clksrc, clksrc))
353 cs->clksrc.name = MCHP_PIT64B_NAME; in mchp_pit64b_init_clksrc()
354 cs->clksrc.mask = CLOCKSOURCE_MASK(64); in mchp_pit64b_init_clksrc()
355 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in mchp_pit64b_init_clksrc()
356 cs->clksrc.rating = 210; in mchp_pit64b_init_clksrc()
357 cs->clksrc.read = mchp_pit64b_clksrc_read; in mchp_pit64b_init_clksrc()
358 cs->clksrc.suspend = mchp_pit64b_clksrc_suspend; in mchp_pit64b_init_clksrc()
359 cs->clksrc.resume = mchp_pit64b_clksrc_resume; in mchp_pit64b_init_clksrc()
361 ret = clocksource_register_hz(&cs->clksrc, clk_rate); in mchp_pit64b_init_clksrc()
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| H A D | timer-ti-dm-systimer.c | 716 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles()
731 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend()
733 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
741 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume()
749 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
756 struct dmtimer_clocksource *clksrc; in dmtimer_clocksource_init() local
761 clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL); in dmtimer_clocksource_init()
762 if (!clksrc) in dmtimer_clocksource_init()
765 dev = &clksrc->dev; in dmtimer_clocksource_init()
766 t = &clksrc->t; in dmtimer_clocksource_init()
[all …]
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| H A D | timer-atmel-tcb.c | 113 static struct clocksource clksrc = { variable
124 return tc_get_cycles(&clksrc); in tc_sched_clock_read()
129 return tc_get_cycles32(&clksrc); in tc_sched_clock_read32()
136 return tc_get_cycles(&clksrc); in tc_delay_timer_read()
141 return tc_get_cycles32(&clksrc); in tc_delay_timer_read32()
450 clksrc.name = kbasename(node->parent->full_name); in tcb_clksrc_init()
452 pr_debug("%s at %d.%03d MHz\n", clksrc.name, divided_rate / 1000000, in tcb_clksrc_init()
459 clksrc.read = tc_get_cycles32; in tcb_clksrc_init()
480 ret = clocksource_register_hz(&clksrc, divided_rate); in tcb_clksrc_init()
497 clocksource_unregister(&clksrc); in tcb_clksrc_init()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/ |
| H A D | mmio.c | 12 struct clocksource clksrc; member
17 return container_of(c, struct clocksource_mmio, clksrc); in to_mmio_clksrc()
63 cs->clksrc.name = name; in clocksource_mmio_init()
64 cs->clksrc.rating = rating; in clocksource_mmio_init()
65 cs->clksrc.read = read; in clocksource_mmio_init()
66 cs->clksrc.mask = CLOCKSOURCE_MASK(bits); in clocksource_mmio_init()
67 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in clocksource_mmio_init()
69 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
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| H A D | timer-atmel-pit.c | 40 struct clocksource clksrc; member
49 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) in clksrc_to_pit_data() argument
51 return container_of(clksrc, struct pit_data, clksrc); in clksrc_to_pit_data()
221 data->clksrc.mask = CLOCKSOURCE_MASK(bits); in at91sam926x_pit_dt_init()
222 data->clksrc.name = "pit"; in at91sam926x_pit_dt_init()
223 data->clksrc.rating = 175; in at91sam926x_pit_dt_init()
224 data->clksrc.read = read_pit_clk; in at91sam926x_pit_dt_init()
225 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in at91sam926x_pit_dt_init()
227 ret = clocksource_register_hz(&data->clksrc, pit_rate); in at91sam926x_pit_dt_init()
239 clocksource_unregister(&data->clksrc); in at91sam926x_pit_dt_init()
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| H A D | timer-sun5i.c | 53 struct clocksource clksrc; member
57 container_of(x, struct sun5i_timer_clksrc, clksrc)
156 static u64 sun5i_clksrc_read(struct clocksource *clksrc) in sun5i_clksrc_read() argument
172 clocksource_unregister(&cs->clksrc); in sun5i_rate_cb_clksrc()
176 clocksource_register_hz(&cs->clksrc, ndata->new_rate); in sun5i_rate_cb_clksrc()
226 cs->clksrc.name = node->name; in sun5i_setup_clocksource()
227 cs->clksrc.rating = 340; in sun5i_setup_clocksource()
228 cs->clksrc.read = sun5i_clksrc_read; in sun5i_setup_clocksource()
229 cs->clksrc.mask = CLOCKSOURCE_MASK(32); in sun5i_setup_clocksource()
230 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in sun5i_setup_clocksource()
[all …]
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| H A D | timer-microchip-pit64b.c | 85 struct clocksource clksrc; member
90 struct mchp_pit64b_clksrc, clksrc))
353 cs->clksrc.name = MCHP_PIT64B_NAME; in mchp_pit64b_init_clksrc()
354 cs->clksrc.mask = CLOCKSOURCE_MASK(64); in mchp_pit64b_init_clksrc()
355 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in mchp_pit64b_init_clksrc()
356 cs->clksrc.rating = 210; in mchp_pit64b_init_clksrc()
357 cs->clksrc.read = mchp_pit64b_clksrc_read; in mchp_pit64b_init_clksrc()
358 cs->clksrc.suspend = mchp_pit64b_clksrc_suspend; in mchp_pit64b_init_clksrc()
359 cs->clksrc.resume = mchp_pit64b_clksrc_resume; in mchp_pit64b_init_clksrc()
361 ret = clocksource_register_hz(&cs->clksrc, clk_rate); in mchp_pit64b_init_clksrc()
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| H A D | timer-ti-dm-systimer.c | 716 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles()
731 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend()
733 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
741 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume()
749 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
756 struct dmtimer_clocksource *clksrc; in dmtimer_clocksource_init() local
761 clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL); in dmtimer_clocksource_init()
762 if (!clksrc) in dmtimer_clocksource_init()
765 dev = &clksrc->dev; in dmtimer_clocksource_init()
766 t = &clksrc->t; in dmtimer_clocksource_init()
[all …]
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| H A D | timer-atmel-tcb.c | 113 static struct clocksource clksrc = { variable
124 return tc_get_cycles(&clksrc); in tc_sched_clock_read()
129 return tc_get_cycles32(&clksrc); in tc_sched_clock_read32()
136 return tc_get_cycles(&clksrc); in tc_delay_timer_read()
141 return tc_get_cycles32(&clksrc); in tc_delay_timer_read32()
450 clksrc.name = kbasename(node->parent->full_name); in tcb_clksrc_init()
452 pr_debug("%s at %d.%03d MHz\n", clksrc.name, divided_rate / 1000000, in tcb_clksrc_init()
459 clksrc.read = tc_get_cycles32; in tcb_clksrc_init()
480 ret = clocksource_register_hz(&clksrc, divided_rate); in tcb_clksrc_init()
497 clocksource_unregister(&clksrc); in tcb_clksrc_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 42 u64 clksrc; member
89 u64 clksrc; member
160 int clksrc; in sja1105_cgu_mii_tx_clk_config() local
163 clksrc = mac_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
165 clksrc = phy_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
168 mii_tx_clk.clksrc = clksrc; in sja1105_cgu_mii_tx_clk_config()
321 int clksrc; in sja1105_cgu_rgmii_tx_clk_config() local
324 clksrc = CLKSRC_PLL0; in sja1105_cgu_rgmii_tx_clk_config()
328 clksrc = clk_sources[port]; in sja1105_cgu_rgmii_tx_clk_config()
332 txc.clksrc = clksrc; in sja1105_cgu_rgmii_tx_clk_config()
[all …]
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 42 u64 clksrc; member
89 u64 clksrc; member
160 int clksrc; in sja1105_cgu_mii_tx_clk_config() local
163 clksrc = mac_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
165 clksrc = phy_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
168 mii_tx_clk.clksrc = clksrc; in sja1105_cgu_mii_tx_clk_config()
321 int clksrc; in sja1105_cgu_rgmii_tx_clk_config() local
324 clksrc = CLKSRC_PLL0; in sja1105_cgu_rgmii_tx_clk_config()
328 clksrc = clk_sources[port]; in sja1105_cgu_rgmii_tx_clk_config()
332 txc.clksrc = clksrc; in sja1105_cgu_rgmii_tx_clk_config()
[all …]
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/dsa/sja1105/ |
| H A D | sja1105_clocking.c | 42 u64 clksrc; member
89 u64 clksrc; member
160 int clksrc; in sja1105_cgu_mii_tx_clk_config() local
163 clksrc = mac_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
165 clksrc = phy_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
168 mii_tx_clk.clksrc = clksrc; in sja1105_cgu_mii_tx_clk_config()
321 int clksrc; in sja1105_cgu_rgmii_tx_clk_config() local
324 clksrc = CLKSRC_PLL0; in sja1105_cgu_rgmii_tx_clk_config()
328 clksrc = clk_sources[port]; in sja1105_cgu_rgmii_tx_clk_config()
332 txc.clksrc = clksrc; in sja1105_cgu_rgmii_tx_clk_config()
[all …]
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| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 1368 unsigned int clksrc, in stm32mp1_check_pll_conf() argument
1388 if (src != (clksrc & RCC_SELR_SRC_MASK)) { in stm32mp1_check_pll_conf()
1591 clksrc & RCC_SELR_SRC_MASK); in stm32mp1_set_clksrc()
1634 if ((clksrc & 0x8U) != 0U) { in stm32mp1_mco_csg()
1639 clksrc & RCC_MCOCFG_MCOSRC_MASK); in stm32mp1_mco_csg()
1652 (clksrc != (uint32_t)CLK_RTC_DISABLED)) { in stm32mp1_set_rtcsrc()
1655 clksrc << RCC_BDCR_RTCSRC_SHIFT); in stm32mp1_set_rtcsrc()
1726 unsigned int clksrc[CLKSRC_NB]; in stm32mp1_clk_init() local
1749 clksrc); in stm32mp1_clk_init()
1829 clksrc[CLKSRC_PLL3], in stm32mp1_clk_init()
[all …]
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| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 1368 unsigned int clksrc, in stm32mp1_check_pll_conf() argument
1388 if (src != (clksrc & RCC_SELR_SRC_MASK)) { in stm32mp1_check_pll_conf()
1591 clksrc & RCC_SELR_SRC_MASK); in stm32mp1_set_clksrc()
1634 if ((clksrc & 0x8U) != 0U) { in stm32mp1_mco_csg()
1639 clksrc & RCC_MCOCFG_MCOSRC_MASK); in stm32mp1_mco_csg()
1652 (clksrc != (uint32_t)CLK_RTC_DISABLED)) { in stm32mp1_set_rtcsrc()
1655 clksrc << RCC_BDCR_RTCSRC_SHIFT); in stm32mp1_set_rtcsrc()
1726 unsigned int clksrc[CLKSRC_NB]; in stm32mp1_clk_init() local
1749 clksrc); in stm32mp1_clk_init()
1829 clksrc[CLKSRC_PLL3], in stm32mp1_clk_init()
[all …]
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| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 1368 unsigned int clksrc, in stm32mp1_check_pll_conf() argument
1388 if (src != (clksrc & RCC_SELR_SRC_MASK)) { in stm32mp1_check_pll_conf()
1591 clksrc & RCC_SELR_SRC_MASK); in stm32mp1_set_clksrc()
1634 if ((clksrc & 0x8U) != 0U) { in stm32mp1_mco_csg()
1639 clksrc & RCC_MCOCFG_MCOSRC_MASK); in stm32mp1_mco_csg()
1652 (clksrc != (uint32_t)CLK_RTC_DISABLED)) { in stm32mp1_set_rtcsrc()
1655 clksrc << RCC_BDCR_RTCSRC_SHIFT); in stm32mp1_set_rtcsrc()
1726 unsigned int clksrc[CLKSRC_NB]; in stm32mp1_clk_init() local
1749 clksrc); in stm32mp1_clk_init()
1829 clksrc[CLKSRC_PLL3], in stm32mp1_clk_init()
[all …]
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| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 1368 unsigned int clksrc, in stm32mp1_check_pll_conf() argument
1388 if (src != (clksrc & RCC_SELR_SRC_MASK)) { in stm32mp1_check_pll_conf()
1591 clksrc & RCC_SELR_SRC_MASK); in stm32mp1_set_clksrc()
1634 if ((clksrc & 0x8U) != 0U) { in stm32mp1_mco_csg()
1639 clksrc & RCC_MCOCFG_MCOSRC_MASK); in stm32mp1_mco_csg()
1652 (clksrc != (uint32_t)CLK_RTC_DISABLED)) { in stm32mp1_set_rtcsrc()
1655 clksrc << RCC_BDCR_RTCSRC_SHIFT); in stm32mp1_set_rtcsrc()
1726 unsigned int clksrc[CLKSRC_NB]; in stm32mp1_clk_init() local
1749 clksrc); in stm32mp1_clk_init()
1829 clksrc[CLKSRC_PLL3], in stm32mp1_clk_init()
[all …]
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