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Searched refs:clock_ctl (Results 1 – 25 of 34) sorted by relevance

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/dports/net/ntpsec/ntpsec-NTPsec_1_2_1/ntpd/
H A Dntp_loopfilter.c463 !clock_ctl.allow_panic) { in local_clock()
480 if (clock_ctl.mode_ntpdate) { in local_clock()
719 if (clock_ctl.pll_control && clock_ctl.kern_enable && freq_cnt == 0) { in local_clock()
918 if (loop_data.lockclock || !clock_ctl.ntp_enable || clock_ctl.mode_ntpdate) in adj_host_clock()
931 } else if (clock_ctl.pll_control && clock_ctl.kern_enable) { in adj_host_clock()
943 if (clock_ctl.pll_control && clock_ctl.kern_enable) in adj_host_clock()
1034 if (clock_ctl.pll_control) { in set_freq()
1038 if (clock_ctl.kern_enable) { in set_freq()
1072 if (clock_ctl.pll_control) { in start_kern_loop()
1090 if (clock_ctl.pll_control && clock_ctl.kern_enable) in stop_kern_loop()
[all …]
H A Dntpd.c258 clock_ctl.allow_panic = true; in parse_cmdline_opts()
261 clock_ctl.force_step_once = true; in parse_cmdline_opts()
314 clock_ctl.mode_ntpdate = true; in parse_cmdline_opts()
801 clock_ctl.allow_panic ? "true" : "false"); in main()
803 clock_ctl.force_step_once ? "true" : "false"); in main()
828 clock_ctl.mode_ntpdate ? "true" : "false"); in main()
H A Dntp_timer.c376 leapsec_electric((clock_ctl.pll_control && clock_ctl.kern_enable) ? electric_on : electric_off); in check_leapsec()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/ath25/
H A Dar2315.c204 static unsigned __init ar2315_sys_clk(u32 clock_ctl) in ar2315_sys_clk() argument
218 switch (clock_ctl & AR2315_CPUCLK_CLK_SEL_M) { in ar2315_sys_clk()
234 cpu_div = ATH25_REG_MS(clock_ctl, AR2315_CPUCLK_CLK_DIV); in ar2315_sys_clk()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/ath25/
H A Dar2315.c204 static unsigned __init ar2315_sys_clk(u32 clock_ctl) in ar2315_sys_clk() argument
218 switch (clock_ctl & AR2315_CPUCLK_CLK_SEL_M) { in ar2315_sys_clk()
234 cpu_div = ATH25_REG_MS(clock_ctl, AR2315_CPUCLK_CLK_DIV); in ar2315_sys_clk()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/ath25/
H A Dar2315.c204 static unsigned __init ar2315_sys_clk(u32 clock_ctl) in ar2315_sys_clk() argument
218 switch (clock_ctl & AR2315_CPUCLK_CLK_SEL_M) { in ar2315_sys_clk()
234 cpu_div = ATH25_REG_MS(clock_ctl, AR2315_CPUCLK_CLK_DIV); in ar2315_sys_clk()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/hid/
H A Dhid-ft260.c139 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
170 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
745 ft260_dbg("clock_ctl: 0x%02x\n", cfg.clock_ctl); in ft260_is_interface_enabled()
875 FT260_SSTAT_ATTR_SHOW(clock_ctl);
876 FT260_BYTE_ATTR_STORE(clock_ctl, ft260_set_system_clock_report,
878 static DEVICE_ATTR_RW(clock_ctl);
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/hid/
H A Dhid-ft260.c139 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
170 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
745 ft260_dbg("clock_ctl: 0x%02x\n", cfg.clock_ctl); in ft260_is_interface_enabled()
875 FT260_SSTAT_ATTR_SHOW(clock_ctl);
876 FT260_BYTE_ATTR_STORE(clock_ctl, ft260_set_system_clock_report,
878 static DEVICE_ATTR_RW(clock_ctl);
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/hid/
H A Dhid-ft260.c139 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
170 u8 clock_ctl; /* 0 - 12MHz, 1 - 24MHz, 2 - 48MHz */ member
745 ft260_dbg("clock_ctl: 0x%02x\n", cfg.clock_ctl); in ft260_is_interface_enabled()
875 FT260_SSTAT_ATTR_SHOW(clock_ctl);
876 FT260_BYTE_ATTR_STORE(clock_ctl, ft260_set_system_clock_report,
878 static DEVICE_ATTR_RW(clock_ctl);
/dports/emulators/qemu/qemu-6.2.0/include/hw/sd/
H A Dallwinner-sdhost.h84 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu60/qemu-6.0.0/include/hw/sd/
H A Dallwinner-sdhost.h84 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu5/qemu-5.2.0/include/hw/sd/
H A Dallwinner-sdhost.h84 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/sd/
H A Dallwinner-sdhost.h84 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/sd/
H A Dallwinner-sdhost.h83 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/sd/
H A Dallwinner-sdhost.h83 uint32_t clock_ctl; /**< Clock Control */ member
/dports/emulators/qemu/qemu-6.2.0/hw/sd/
H A Dallwinner-sdhost.c425 res = s->clock_ctl; in allwinner_sdhost_read()
563 s->clock_ctl = value; in allwinner_sdhost_write()
699 VMSTATE_UINT32(clock_ctl, AwSdHostState),
767 s->clock_ctl = REG_SD_CKCR_RST; in allwinner_sdhost_reset()
/dports/emulators/qemu60/qemu-6.0.0/hw/sd/
H A Dallwinner-sdhost.c425 res = s->clock_ctl; in allwinner_sdhost_read()
563 s->clock_ctl = value; in allwinner_sdhost_write()
699 VMSTATE_UINT32(clock_ctl, AwSdHostState),
767 s->clock_ctl = REG_SD_CKCR_RST; in allwinner_sdhost_reset()
/dports/emulators/qemu5/qemu-5.2.0/hw/sd/
H A Dallwinner-sdhost.c425 res = s->clock_ctl; in allwinner_sdhost_read()
563 s->clock_ctl = value; in allwinner_sdhost_write()
699 VMSTATE_UINT32(clock_ctl, AwSdHostState),
767 s->clock_ctl = REG_SD_CKCR_RST; in allwinner_sdhost_reset()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/sd/
H A Dallwinner-sdhost.c423 res = s->clock_ctl;
562 s->clock_ctl = value;
700 VMSTATE_UINT32(clock_ctl, AwSdHostState),
750 s->clock_ctl = REG_SD_CKCR_RST;
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/sd/
H A Dallwinner-sdhost.c425 res = s->clock_ctl; in allwinner_sdhost_read()
563 s->clock_ctl = value; in allwinner_sdhost_write()
699 VMSTATE_UINT32(clock_ctl, AwSdHostState),
767 s->clock_ctl = REG_SD_CKCR_RST; in allwinner_sdhost_reset()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/sd/
H A Dallwinner-sdhost.c423 res = s->clock_ctl; in allwinner_sdhost_read()
562 s->clock_ctl = value; in allwinner_sdhost_write()
700 VMSTATE_UINT32(clock_ctl, AwSdHostState),
750 s->clock_ctl = REG_SD_CKCR_RST; in allwinner_sdhost_reset()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/memstick/host/
H A Djmb38x_ms.c679 unsigned int clock_ctl = CLOCK_CONTROL_BY_MMIO, clock_delay = 0; in jmb38x_ms_set_param() local
725 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
732 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
738 clock_ctl |= CLOCK_CONTROL_50MHZ; in jmb38x_ms_set_param()
745 writel(clock_ctl, host->addr + CLOCK_CONTROL); in jmb38x_ms_set_param()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/memstick/host/
H A Djmb38x_ms.c679 unsigned int clock_ctl = CLOCK_CONTROL_BY_MMIO, clock_delay = 0; in jmb38x_ms_set_param() local
725 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
732 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
738 clock_ctl |= CLOCK_CONTROL_50MHZ; in jmb38x_ms_set_param()
745 writel(clock_ctl, host->addr + CLOCK_CONTROL); in jmb38x_ms_set_param()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/memstick/host/
H A Djmb38x_ms.c679 unsigned int clock_ctl = CLOCK_CONTROL_BY_MMIO, clock_delay = 0; in jmb38x_ms_set_param() local
725 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
732 clock_ctl |= CLOCK_CONTROL_40MHZ; in jmb38x_ms_set_param()
738 clock_ctl |= CLOCK_CONTROL_50MHZ; in jmb38x_ms_set_param()
745 writel(clock_ctl, host->addr + CLOCK_CONTROL); in jmb38x_ms_set_param()
/dports/net/ntpsec/ntpsec-NTPsec_1_2_1/include/
H A Dntpd.h313 extern struct clock_control_flags clock_ctl;

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