/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/samsung/odroid/ |
H A D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 188 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 196 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 216 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/samsung/odroid/ |
H A D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 188 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 196 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 216 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/samsung/odroid/ |
H A D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 188 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 196 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 216 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/samsung/odroid/ |
H A D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 188 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 196 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 216 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/samsung/odroid/ |
H A D | odroid.c | 103 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 196 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 204 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 224 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/samsung/odroid/ |
H A D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 188 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 196 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 216 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/samsung/odroid/ |
H A D | odroid.c | 106 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local 199 clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | in board_clock_init() 207 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init() 227 clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); in board_clock_init()
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