/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
H A D | a32_jitstate.cpp | 51 u32 cpsr = 0; in Cpsr() local 54 cpsr |= cpsr_nzcv; in Cpsr() 56 cpsr |= cpsr_q ? 1 << 27 : 0; in Cpsr() 58 cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; in Cpsr() 61 cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; in Cpsr() 69 cpsr |= cpsr_jaifm; in Cpsr() 71 return cpsr; in Cpsr() 74 void A32JitState::SetCpsr(u32 cpsr) { in SetCpsr() argument 76 cpsr_nzcv = cpsr & 0xF0000000; in SetCpsr() 78 cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; in SetCpsr() [all …]
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/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/ |
H A D | a32_jitstate.cpp | 51 u32 cpsr = 0; in Cpsr() local 54 cpsr |= cpsr_nzcv; in Cpsr() 56 cpsr |= cpsr_q ? 1 << 27 : 0; in Cpsr() 58 cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; in Cpsr() 61 cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; in Cpsr() 69 cpsr |= cpsr_jaifm; in Cpsr() 71 return cpsr; in Cpsr() 74 void A32JitState::SetCpsr(u32 cpsr) { in SetCpsr() argument 76 cpsr_nzcv = cpsr & 0xF0000000; in SetCpsr() 78 cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; in SetCpsr() [all …]
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/dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/backend/x64/ |
H A D | a32_jitstate.cpp | 52 u32 cpsr = 0; in Cpsr() local 55 cpsr |= NZCV::FromX64(cpsr_nzcv); in Cpsr() 57 cpsr |= cpsr_q ? 1 << 27 : 0; in Cpsr() 59 cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; in Cpsr() 62 cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; in Cpsr() 70 cpsr |= cpsr_jaifm; in Cpsr() 72 return cpsr; in Cpsr() 75 void A32JitState::SetCpsr(u32 cpsr) { in SetCpsr() argument 77 cpsr_nzcv = NZCV::ToX64(cpsr); in SetCpsr() 79 cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; in SetCpsr() [all …]
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/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/x64/ |
H A D | a32_jitstate.cpp | 52 u32 cpsr = 0; in Cpsr() local 55 cpsr |= NZCV::FromX64(cpsr_nzcv); in Cpsr() 57 cpsr |= cpsr_q ? 1 << 27 : 0; in Cpsr() 59 cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; in Cpsr() 62 cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; in Cpsr() 70 cpsr |= cpsr_jaifm; in Cpsr() 72 return cpsr; in Cpsr() 75 void A32JitState::SetCpsr(u32 cpsr) { in SetCpsr() argument 77 cpsr_nzcv = NZCV::ToX64(cpsr); in SetCpsr() 79 cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; in SetCpsr() [all …]
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/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/x64/ |
H A D | a32_jitstate.cpp | 52 u32 cpsr = 0; in Cpsr() local 55 cpsr |= NZCV::FromX64(cpsr_nzcv); in Cpsr() 57 cpsr |= cpsr_q ? 1 << 27 : 0; in Cpsr() 59 cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; in Cpsr() 62 cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; in Cpsr() 70 cpsr |= cpsr_jaifm; in Cpsr() 72 return cpsr; in Cpsr() 75 void A32JitState::SetCpsr(u32 cpsr) { in SetCpsr() argument 77 cpsr_nzcv = NZCV::ToX64(cpsr); in SetCpsr() 79 cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; in SetCpsr() [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 40 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 42 tBcc %bb.2, 1, $cpsr 76 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 79 tBcc %bb.2, 1, $cpsr 111 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 113 tBcc %bb.2, 1, $cpsr 142 tBcc %bb.2, 1, $cpsr 174 tBcc %bb.2, 1, $cpsr 206 tBcc %bb.2, 1, $cpsr 238 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 40 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 42 tBcc %bb.2, 1, $cpsr 76 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 79 tBcc %bb.2, 1, $cpsr 111 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 113 tBcc %bb.2, 1, $cpsr 142 tBcc %bb.2, 1, $cpsr 174 tBcc %bb.2, 1, $cpsr 206 tBcc %bb.2, 1, $cpsr 238 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 40 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 42 tBcc %bb.2, 1, $cpsr 76 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 79 tBcc %bb.2, 1, $cpsr 111 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 113 tBcc %bb.2, 1, $cpsr 142 tBcc %bb.2, 1, $cpsr 174 tBcc %bb.2, 1, $cpsr 206 tBcc %bb.2, 1, $cpsr 238 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/valgrind/valgrind-dragonfly-dragonfly/none/tests/arm/ |
H A D | v6intARM.stdout.exp | 2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z 8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N 11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C 12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC 13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C 17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N [all …]
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H A D | v6media.stdout.exp | 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 57 clz r0, r1 :: rd 0x00000020 rm 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 58 clz r0, r1 :: rd 0x0000001f rm 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000 59 clz r0, r1 :: rd 0x0000001b rm 0x00000010, carryin 0, cpsr 0x00000000 ge[3:0]=0000 60 clz r0, r1 :: rd 0x00000000 rm 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 61 clz r0, r1 :: rd 0x00000020 rm 0x00000000, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 62 clz r0, r1 :: rd 0x0000001f rm 0x00000001, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 63 clz r0, r1 :: rd 0x0000001b rm 0x00000010, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 64 clz r0, r1 :: rd 0x00000000 rm 0xffffffff, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 66 uxtb r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 [all …]
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/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/none/tests/arm/ |
H A D | v6intARM.stdout.exp | 2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 3 cpy r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000 7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z 8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N 11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C 12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC 13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C 17 mvn r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x00000000 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N [all …]
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H A D | v6media.stdout.exp | 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[… 57 clz r0, r1 :: rd 0x00000020 rm 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 58 clz r0, r1 :: rd 0x0000001f rm 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000 59 clz r0, r1 :: rd 0x0000001b rm 0x00000010, carryin 0, cpsr 0x00000000 ge[3:0]=0000 60 clz r0, r1 :: rd 0x00000000 rm 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000 61 clz r0, r1 :: rd 0x00000020 rm 0x00000000, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 62 clz r0, r1 :: rd 0x0000001f rm 0x00000001, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 63 clz r0, r1 :: rd 0x0000001b rm 0x00000010, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 64 clz r0, r1 :: rd 0x00000000 rm 0xffffffff, carryin 1, cpsr 0x20000000 C ge[3:0]=0000 66 uxtb r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000 [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/probes/ |
H A D | decode.c | 86 return cpsr & PSR_Z_BIT; in __check_eq() 96 return cpsr & PSR_C_BIT; in __check_cs() 106 return cpsr & PSR_N_BIT; in __check_mi() 116 return cpsr & PSR_V_BIT; in __check_vs() 126 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_hi() 127 return cpsr & PSR_C_BIT; in __check_hi() 132 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_ls() 138 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_ge() 144 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_lt() 150 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_gt() [all …]
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/probes/ |
H A D | decode.c | 86 return cpsr & PSR_Z_BIT; in __check_eq() 96 return cpsr & PSR_C_BIT; in __check_cs() 106 return cpsr & PSR_N_BIT; in __check_mi() 116 return cpsr & PSR_V_BIT; in __check_vs() 126 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_hi() 127 return cpsr & PSR_C_BIT; in __check_hi() 132 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_ls() 138 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_ge() 144 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_lt() 150 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_gt() [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/probes/ |
H A D | decode.c | 86 return cpsr & PSR_Z_BIT; in __check_eq() 96 return cpsr & PSR_C_BIT; in __check_cs() 106 return cpsr & PSR_N_BIT; in __check_mi() 116 return cpsr & PSR_V_BIT; in __check_vs() 126 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_hi() 127 return cpsr & PSR_C_BIT; in __check_hi() 132 cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ in __check_ls() 138 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_ge() 144 cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_lt() 150 unsigned long temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ in __check_gt() [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm64/kvm/hyp/ |
H A D | aarch32.c | 49 unsigned long cpsr; in kvm_condition_valid32() local 62 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32() 68 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32() 78 cpsr_cond = cpsr >> 28; in kvm_condition_valid32() 105 cond = (cpsr & 0xe000) >> 13; in kvm_adjust_itstate() 106 itbits = (cpsr & 0x1c00) >> (10 - 2); in kvm_adjust_itstate() 115 cpsr &= ~PSR_AA32_IT_MASK; in kvm_adjust_itstate() 116 cpsr |= cond << 13; in kvm_adjust_itstate() 117 cpsr |= (itbits & 0x1c) << (10 - 2); in kvm_adjust_itstate() 118 cpsr |= (itbits & 0x3) << 25; in kvm_adjust_itstate() [all …]
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm64/kvm/hyp/ |
H A D | aarch32.c | 49 unsigned long cpsr; in kvm_condition_valid32() local 62 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32() 68 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32() 78 cpsr_cond = cpsr >> 28; in kvm_condition_valid32() 105 cond = (cpsr & 0xe000) >> 13; in kvm_adjust_itstate() 106 itbits = (cpsr & 0x1c00) >> (10 - 2); in kvm_adjust_itstate() 115 cpsr &= ~PSR_AA32_IT_MASK; in kvm_adjust_itstate() 116 cpsr |= cond << 13; in kvm_adjust_itstate() 117 cpsr |= (itbits & 0x1c) << (10 - 2); in kvm_adjust_itstate() 118 cpsr |= (itbits & 0x3) << 25; in kvm_adjust_itstate() [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm64/kvm/hyp/ |
H A D | aarch32.c | 49 unsigned long cpsr; in kvm_condition_valid32() local 62 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32() 68 it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3); in kvm_condition_valid32() 78 cpsr_cond = cpsr >> 28; in kvm_condition_valid32() 105 cond = (cpsr & 0xe000) >> 13; in kvm_adjust_itstate() 106 itbits = (cpsr & 0x1c00) >> (10 - 2); in kvm_adjust_itstate() 115 cpsr &= ~PSR_AA32_IT_MASK; in kvm_adjust_itstate() 116 cpsr |= cond << 13; in kvm_adjust_itstate() 117 cpsr |= (itbits & 0x1c) << (10 - 2); in kvm_adjust_itstate() 118 cpsr |= (itbits & 0x3) << 25; in kvm_adjust_itstate() [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/Thumb/ |
H A D | peephole-mi.mir | 50 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 52 tBcc %bb.2, 1, $cpsr 95 %2:tgpr, dead $cpsr = tADC %0, %1, 14, $noreg, implicit $cpsr 98 tBcc %bb.2, 1, $cpsr 139 %2:tgpr, dead $cpsr = tSBC %0, %1, 14, $noreg, implicit $cpsr 141 tBcc %bb.2, 1, $cpsr 179 tBcc %bb.2, 1, $cpsr 220 tBcc %bb.2, 1, $cpsr 261 tBcc %bb.2, 1, $cpsr 302 tBcc %bb.2, 1, $cpsr [all …]
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