/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/mips/ |
H A D | cp2.s | 70 ctc2 $0, $0 71 ctc2 $0, $1 72 ctc2 $0, $2 73 ctc2 $0, $3 74 ctc2 $0, $4 75 ctc2 $0, $5 76 ctc2 $0, $6 77 ctc2 $0, $7 78 ctc2 $0, $8 79 ctc2 $0, $9 [all …]
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H A D | cp2.d | 72 [0-9a-f]+ <[^>]*> 48c00000 ctc2 zero,\$0 73 [0-9a-f]+ <[^>]*> 48c00800 ctc2 zero,\$1 74 [0-9a-f]+ <[^>]*> 48c01000 ctc2 zero,\$2 75 [0-9a-f]+ <[^>]*> 48c01800 ctc2 zero,\$3 76 [0-9a-f]+ <[^>]*> 48c02000 ctc2 zero,\$4 77 [0-9a-f]+ <[^>]*> 48c02800 ctc2 zero,\$5 78 [0-9a-f]+ <[^>]*> 48c03000 ctc2 zero,\$6 79 [0-9a-f]+ <[^>]*> 48c03800 ctc2 zero,\$7 80 [0-9a-f]+ <[^>]*> 48c04000 ctc2 zero,\$8 81 [0-9a-f]+ <[^>]*> 48c04800 ctc2 zero,\$9 [all …]
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H A D | micromips@cp2.d | 73 [0-9a-f]+ <[^>]*> 0000 dd3c ctc2 zero,\$0 74 [0-9a-f]+ <[^>]*> 0001 dd3c ctc2 zero,\$1 75 [0-9a-f]+ <[^>]*> 0002 dd3c ctc2 zero,\$2 76 [0-9a-f]+ <[^>]*> 0003 dd3c ctc2 zero,\$3 77 [0-9a-f]+ <[^>]*> 0004 dd3c ctc2 zero,\$4 78 [0-9a-f]+ <[^>]*> 0005 dd3c ctc2 zero,\$5 79 [0-9a-f]+ <[^>]*> 0006 dd3c ctc2 zero,\$6 80 [0-9a-f]+ <[^>]*> 0007 dd3c ctc2 zero,\$7 81 [0-9a-f]+ <[^>]*> 0008 dd3c ctc2 zero,\$8 82 [0-9a-f]+ <[^>]*> 0009 dd3c ctc2 zero,\$9 [all …]
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H A D | cp2.l | 66 .*:70: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$0' 68 .*:72: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$2' 70 .*:74: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$4' 72 .*:76: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$6' 74 .*:78: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$8' 76 .*:80: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$10' 78 .*:82: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$12' 80 .*:84: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$14' 82 .*:86: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$16' 84 .*:88: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$18' [all …]
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H A D | r5900-vu0.s | 40 ctc2 $0,$0 41 ctc2 $0,$31 42 ctc2.i $0,$0 43 ctc2.i $0,$31 44 ctc2.ni $0,$0 45 ctc2.ni $0,$31
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H A D | r5900-vu0.d | 40 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 41 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31 42 [0-9a-f]+ <[^>]*> 48c00001 ctc2.i \$0,\$vi0 43 [0-9a-f]+ <[^>]*> 48c0f801 ctc2.i \$0,\$vi31 44 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 45 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31
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/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/mips/ |
H A D | cp2.s | 70 ctc2 $0, $0 71 ctc2 $0, $1 72 ctc2 $0, $2 73 ctc2 $0, $3 74 ctc2 $0, $4 75 ctc2 $0, $5 76 ctc2 $0, $6 77 ctc2 $0, $7 78 ctc2 $0, $8 79 ctc2 $0, $9 [all …]
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H A D | cp2.d | 72 [0-9a-f]+ <[^>]*> 48c00000 ctc2 zero,\$0 73 [0-9a-f]+ <[^>]*> 48c00800 ctc2 zero,\$1 74 [0-9a-f]+ <[^>]*> 48c01000 ctc2 zero,\$2 75 [0-9a-f]+ <[^>]*> 48c01800 ctc2 zero,\$3 76 [0-9a-f]+ <[^>]*> 48c02000 ctc2 zero,\$4 77 [0-9a-f]+ <[^>]*> 48c02800 ctc2 zero,\$5 78 [0-9a-f]+ <[^>]*> 48c03000 ctc2 zero,\$6 79 [0-9a-f]+ <[^>]*> 48c03800 ctc2 zero,\$7 80 [0-9a-f]+ <[^>]*> 48c04000 ctc2 zero,\$8 81 [0-9a-f]+ <[^>]*> 48c04800 ctc2 zero,\$9 [all …]
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H A D | micromips@cp2.d | 73 [0-9a-f]+ <[^>]*> 0000 dd3c ctc2 zero,\$0 74 [0-9a-f]+ <[^>]*> 0001 dd3c ctc2 zero,\$1 75 [0-9a-f]+ <[^>]*> 0002 dd3c ctc2 zero,\$2 76 [0-9a-f]+ <[^>]*> 0003 dd3c ctc2 zero,\$3 77 [0-9a-f]+ <[^>]*> 0004 dd3c ctc2 zero,\$4 78 [0-9a-f]+ <[^>]*> 0005 dd3c ctc2 zero,\$5 79 [0-9a-f]+ <[^>]*> 0006 dd3c ctc2 zero,\$6 80 [0-9a-f]+ <[^>]*> 0007 dd3c ctc2 zero,\$7 81 [0-9a-f]+ <[^>]*> 0008 dd3c ctc2 zero,\$8 82 [0-9a-f]+ <[^>]*> 0009 dd3c ctc2 zero,\$9 [all …]
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H A D | cp2.l | 66 .*:70: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$0' 68 .*:72: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$2' 70 .*:74: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$4' 72 .*:76: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$6' 74 .*:78: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$8' 76 .*:80: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$10' 78 .*:82: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$12' 80 .*:84: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$14' 82 .*:86: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$16' 84 .*:88: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$18' [all …]
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H A D | r5900-vu0.s | 40 ctc2 $0,$0 41 ctc2 $0,$31 42 ctc2.i $0,$0 43 ctc2.i $0,$31 44 ctc2.ni $0,$0 45 ctc2.ni $0,$31
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H A D | r5900-vu0.d | 40 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 41 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31 42 [0-9a-f]+ <[^>]*> 48c00001 ctc2.i \$0,\$vi0 43 [0-9a-f]+ <[^>]*> 48c0f801 ctc2.i \$0,\$vi31 44 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 45 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31
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/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/mips/ |
H A D | cp2.s | 70 ctc2 $0, $0 71 ctc2 $0, $1 72 ctc2 $0, $2 73 ctc2 $0, $3 74 ctc2 $0, $4 75 ctc2 $0, $5 76 ctc2 $0, $6 77 ctc2 $0, $7 78 ctc2 $0, $8 79 ctc2 $0, $9 [all …]
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H A D | cp2.d | 72 [0-9a-f]+ <[^>]*> 48c00000 ctc2 zero,\$0 73 [0-9a-f]+ <[^>]*> 48c00800 ctc2 zero,\$1 74 [0-9a-f]+ <[^>]*> 48c01000 ctc2 zero,\$2 75 [0-9a-f]+ <[^>]*> 48c01800 ctc2 zero,\$3 76 [0-9a-f]+ <[^>]*> 48c02000 ctc2 zero,\$4 77 [0-9a-f]+ <[^>]*> 48c02800 ctc2 zero,\$5 78 [0-9a-f]+ <[^>]*> 48c03000 ctc2 zero,\$6 79 [0-9a-f]+ <[^>]*> 48c03800 ctc2 zero,\$7 80 [0-9a-f]+ <[^>]*> 48c04000 ctc2 zero,\$8 81 [0-9a-f]+ <[^>]*> 48c04800 ctc2 zero,\$9 [all …]
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H A D | micromips@cp2.d | 73 [0-9a-f]+ <[^>]*> 0000 dd3c ctc2 zero,\$0 74 [0-9a-f]+ <[^>]*> 0001 dd3c ctc2 zero,\$1 75 [0-9a-f]+ <[^>]*> 0002 dd3c ctc2 zero,\$2 76 [0-9a-f]+ <[^>]*> 0003 dd3c ctc2 zero,\$3 77 [0-9a-f]+ <[^>]*> 0004 dd3c ctc2 zero,\$4 78 [0-9a-f]+ <[^>]*> 0005 dd3c ctc2 zero,\$5 79 [0-9a-f]+ <[^>]*> 0006 dd3c ctc2 zero,\$6 80 [0-9a-f]+ <[^>]*> 0007 dd3c ctc2 zero,\$7 81 [0-9a-f]+ <[^>]*> 0008 dd3c ctc2 zero,\$8 82 [0-9a-f]+ <[^>]*> 0009 dd3c ctc2 zero,\$9 [all …]
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H A D | cp2.l | 66 .*:70: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$0' 68 .*:72: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$2' 70 .*:74: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$4' 72 .*:76: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$6' 74 .*:78: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$8' 76 .*:80: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$10' 78 .*:82: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$12' 80 .*:84: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$14' 82 .*:86: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$16' 84 .*:88: Error: opcode not supported on this processor: .* \(.*\) `ctc2 \$0,\$18' [all …]
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H A D | r5900-vu0.s | 40 ctc2 $0,$0 41 ctc2 $0,$31 42 ctc2.i $0,$0 43 ctc2.i $0,$31 44 ctc2.ni $0,$0 45 ctc2.ni $0,$31
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H A D | r5900-vu0.d | 40 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 41 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31 42 [0-9a-f]+ <[^>]*> 48c00001 ctc2.i \$0,\$vi0 43 [0-9a-f]+ <[^>]*> 48c0f801 ctc2.i \$0,\$vi31 44 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 45 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31
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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/mips/ |
H A D | r5900-vu0.s | 40 ctc2 $0,$0 41 ctc2 $0,$31 42 ctc2.i $0,$0 43 ctc2.i $0,$31 44 ctc2.ni $0,$0 45 ctc2.ni $0,$31
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H A D | r5900-vu0.d | 40 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 41 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31 42 [0-9a-f]+ <[^>]*> 48c00001 ctc2.i \$0,\$vi0 43 [0-9a-f]+ <[^>]*> 48c0f801 ctc2.i \$0,\$vi31 44 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 45 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31
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/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/mips/ |
H A D | r5900-vu0.s | 40 ctc2 $0,$0 41 ctc2 $0,$31 42 ctc2.i $0,$0 43 ctc2.i $0,$31 44 ctc2.ni $0,$0 45 ctc2.ni $0,$31
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H A D | r5900-vu0.d | 40 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 41 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31 42 [0-9a-f]+ <[^>]*> 48c00001 ctc2.i \$0,\$vi0 43 [0-9a-f]+ <[^>]*> 48c0f801 ctc2.i \$0,\$vi31 44 [0-9a-f]+ <[^>]*> 48c00000 ctc2 \$0,\$vi0 45 [0-9a-f]+ <[^>]*> 48c0f800 ctc2 \$0,\$vi31
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/dports/math/octave-forge-interval/interval-3.2.0/inst/ |
H A D | ctc_union.m | 47 function c = ctc_union (ctc1, y1, ctc2, y2) 52 ctc2 = y1; variable 56 y2 = ctc2; 57 ctc2 = y1; variable 80 if (not (is_function_handle (ctc2)) && not (ischar (ctc2))) 85 c = @(varargin) ctc_union_eval (ctc1, y1, ctc2, y2, varargin{:}); 90 function varargout = ctc_union_eval (ctc1, y1, ctc2, y2, varargin) 102 fval_and_contractions2 = nthargout (1 : nargout, ctc2, y2, x{:});
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H A D | ctc_intersect.m | 47 function c = ctc_intersect (ctc1, y1, ctc2, y2) 52 ctc2 = y1; variable 56 y2 = ctc2; 57 ctc2 = y1; variable 80 if (not (is_function_handle (ctc2)) && not (ischar (ctc2))) 85 c = @(varargin) ctc_intersect_eval (ctc1, y1, ctc2, y2, varargin{:}); 90 function varargout = ctc_intersect_eval (ctc1, y1, ctc2, y2, varargin) 102 fval_and_contractions2 = nthargout (1 : nargout, ctc2, y2, x{:});
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/dports/emulators/mess/mame-mame0226/src/mame/drivers/ |
H A D | jade.cpp | 76 z80ctc_device &ctc2(Z80CTC(config, "ctc2", 4_MHz_XTAL)); in INPUT_PORTS_START() local 77 ctc2.set_clk<0>(4_MHz_XTAL / 2); in INPUT_PORTS_START() 78 ctc2.zc_callback<0>().set("sio", FUNC(z80sio_device::rxca_w)); in INPUT_PORTS_START() 79 ctc2.zc_callback<0>().append("sio", FUNC(z80sio_device::txca_w)); in INPUT_PORTS_START()
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