| /dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/mtd/nand/ |
| H A D | mxs_nand.c | 45 int cur_chip; member
311 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
344 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
357 nand_info->cur_chip = chip; in mxs_nand_select_chip()
433 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
458 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
516 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
569 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
585 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
611 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 270 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
320 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
351 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
364 nand_info->cur_chip = chip; in mxs_nand_select_chip()
437 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
462 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
523 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
577 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
619 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 270 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
320 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
351 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
364 nand_info->cur_chip = chip; in mxs_nand_select_chip()
437 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
462 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
523 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
577 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
619 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 270 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
320 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
351 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip);
364 nand_info->cur_chip = chip;
437 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
462 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
523 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
577 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
619 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) |
[all …]
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 270 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
320 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
351 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
364 nand_info->cur_chip = chip; in mxs_nand_select_chip()
437 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
462 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
523 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
577 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
619 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 270 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
320 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
351 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
364 nand_info->cur_chip = chip; in mxs_nand_select_chip()
437 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
462 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
523 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
577 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
619 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/mtd/nand/raw/ |
| H A D | mxs_nand.c | 340 uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip; in mxs_nand_cmd_ctrl()
390 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_cmd_ctrl()
421 tmp >>= (GPMI_STAT_READY_BUSY_OFFSET + nand_info->cur_chip); in mxs_nand_device_ready()
434 nand_info->cur_chip = chip; in mxs_nand_select_chip()
507 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
532 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_read_buf()
593 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_write_buf()
688 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
704 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
736 (nand_info->cur_chip << GPMI_CTRL0_CS_OFFSET) | in mxs_nand_ecc_read_page()
[all …]
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