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Searched refs:dcc_size (Results 1 – 25 of 25) sorted by relevance

/dports/www/chromium-legacy/chromium-88.0.4324.182/rlz/win/lib/
H A Dmachine_deal.cc255 bool MachineDealCode::Get(char* dcc, int dcc_size) { in Get() argument
260 if (!dcc || dcc_size <= 0) { in Get()
273 size_t size = dcc_size; in Get()
294 DWORD dcc_size = base::size(dcc); in Clear() local
295 if (dcc_key.ReadValue(kDccValueName, dcc, &dcc_size, NULL) == ERROR_SUCCESS) { in Clear()
H A Dmachine_deal.h26 int dcc_size,
47 static bool Get(char* dcc, int dcc_size);
H A Drlz_lib_win.cc201 bool GetMachineDealCode(char* dcc, size_t dcc_size) { in GetMachineDealCode() argument
202 return MachineDealCode::Get(dcc, dcc_size); in GetMachineDealCode()
/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/libosmesa/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-libs/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-dri/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/lang/clover/mesa-21.3.6/src/amd/common/
H A Dac_surface_modifier_test.c282 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
286 assert(surf.u.gfx9.color.display_dcc_size == align(dcc_size, dcc_align)); in test_modifier()
290 expected_offset += align(dcc_size, dcc_align); in test_modifier()
320 uint64_t dcc_size = block_count(dims[i][0], dims[i][1], in test_modifier() local
323 dcc_size = align64(dcc_size, dcc_align); in test_modifier()
324 assert(surf.meta_size == dcc_size); in test_modifier()
326 expected_offset += dcc_size; in test_modifier()
/dports/www/chromium-legacy/chromium-88.0.4324.182/rlz/win/dll/
H A Dexports.cc61 RLZ_DLL_EXPORT bool GetMachineDealCode2(char* dcc, size_t dcc_size) { in GetMachineDealCode2() argument
62 return rlz_lib::GetMachineDealCode(dcc, dcc_size); in GetMachineDealCode2()
/dports/www/chromium-legacy/chromium-88.0.4324.182/rlz/lib/
H A Dmachine_deal_win.h41 bool RLZ_LIB_API GetMachineDealCode(char* dcc, size_t dcc_size);
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/common/
H A Dac_surface.c597 surf_level->dcc_offset = surf->dcc_size; in gfx6_compute_level()
651 surf->dcc_size = 0; in gfx6_compute_level()
1079 surf->dcc_size = 0; in gfx6_compute_surface()
1232 if (surf->dcc_size && config->info.levels > 1) { in gfx6_compute_surface()
1241 surf->dcc_size = align64(surf->surf_size >> 8, in gfx6_compute_surface()
1607 surf->dcc_size = dout.dccRamSize; in gfx9_compute_miptree()
1650 surf->dcc_size = 0; in gfx9_compute_miptree()
1652 surf->u.gfx9.display_dcc_size = surf->dcc_size; in gfx9_compute_miptree()
1682 surf->dcc_size <= UINT16_MAX + 1; in gfx9_compute_miptree()
2046 surf->dcc_size = 0; in gfx9_compute_surface()
[all …]
H A Dac_surface.h233 uint32_t dcc_size; member
/dports/devel/openocd/openocd-0.11.0/src/target/
H A Dferoceon.c499 uint32_t dcc_size = sizeof(dcc_code); in feroceon_bulk_write_memory() local
509 uint8_t dcc_code_buf[dcc_size]; in feroceon_bulk_write_memory()
512 if (target_alloc_working_area(target, dcc_size, &arm7_9->dcc_working_area) != ERROR_OK) { in feroceon_bulk_write_memory()
523 arm7_9->dcc_working_area->address, 4, dcc_size/4, dcc_code_buf); in feroceon_bulk_write_memory()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/
H A Dsi_texture.c873 tex->surface.dcc_offset, tex->surface.dcc_size, tex->surface.dcc_alignment, in si_print_texture_info()
918 tex->surface.dcc_offset, tex->surface.dcc_size, tex->surface.dcc_alignment); in si_print_texture_info()
1114 tex->surface.dcc_size, DCC_CLEAR_COLOR_0000); in si_texture_create_object()
1118 tex->surface.dcc_size, DCC_UNCOMPRESSED); in si_texture_create_object()
1124 tex->surface.dcc_size, DCC_UNCOMPRESSED); in si_texture_create_object()
1143 if (size != tex->surface.dcc_size) { in si_texture_create_object()
1145 tex->surface.dcc_size - size, DCC_UNCOMPRESSED); in si_texture_create_object()
2131 !tex->surface.dcc_size || sctx->screen->debug_flags & DBG(NO_DCC) || in vi_separate_dcc_try_enable()
2163 tex->surface.dcc_size, tex->surface.dcc_alignment); in vi_separate_dcc_try_enable()
H A Dsi_clear.c242 clear_size = tex->surface.dcc_size; in vi_dcc_clear_level()
H A Dsi_compute_blit.c645 img[1].u.buf.size = tex->surface.dcc_size; in si_retile_dcc()
H A Dsi_blit.c1289 tex->surface.dcc_size, &clear_value, 4, in si_decompress_dcc()
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/vulkan/
H A Dradv_private.h1883 return image->planes[0].surface.dcc_size; in radv_image_has_dcc()
H A Dradv_meta_clear.c1548 size = image->planes[0].surface.dcc_size; in radv_clear_dcc()
H A Dradv_cmd_buffer.c5957 if (size != image->planes[0].surface.dcc_size) { in radv_initialize_dcc()
5961 image->planes[0].surface.dcc_size - size, in radv_initialize_dcc()