| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 58 const char ddr_cfg_2_rbc[] = { variable
658 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
661 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
670 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
671 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
678 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
687 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
689 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
691 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 58 const char ddr_cfg_2_rbc[] = { variable
658 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
661 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
670 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
671 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
678 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
687 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
689 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
691 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 58 const char ddr_cfg_2_rbc[] = { variable
658 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
661 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
670 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
671 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
678 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
687 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
689 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
691 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 58 const char ddr_cfg_2_rbc[] = { variable
658 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
661 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
670 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
671 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
678 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
687 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
689 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
691 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-rockchip/rk3036/ |
| H A D | sdram_rk3036.c | 59 const char ddr_cfg_2_rbc[] = { variable
659 if (noc_config == ddr_cfg_2_rbc[9]) { in dram_cfg_rbc()
662 } else if (noc_config == ddr_cfg_2_rbc[10]) { in dram_cfg_rbc()
671 for (i = 0; i < sizeof(ddr_cfg_2_rbc); i++) { in dram_cfg_rbc()
672 if (noc_config == ddr_cfg_2_rbc[i]) in dram_cfg_rbc()
679 if (noc_config == ddr_cfg_2_rbc[11]) { in dram_cfg_rbc()
688 if (noc_config == ddr_cfg_2_rbc[0]) in dram_cfg_rbc()
690 else if (noc_config == ddr_cfg_2_rbc[12]) in dram_cfg_rbc()
692 else if (noc_config == ddr_cfg_2_rbc[13]) in dram_cfg_rbc()
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