| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 20 dimm_params_t ddr_raw_timing = { variable
51 dimm_params_t ddr_raw_timing = { variable
82 dimm_params_t ddr_raw_timing = { variable
119 dimm_params_t ddr_raw_timing = { variable
157 dimm_params_t ddr_raw_timing = { variable
197 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 20 dimm_params_t ddr_raw_timing = { variable
51 dimm_params_t ddr_raw_timing = { variable
82 dimm_params_t ddr_raw_timing = { variable
119 dimm_params_t ddr_raw_timing = { variable
157 dimm_params_t ddr_raw_timing = { variable
197 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-chip/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 20 dimm_params_t ddr_raw_timing = { variable
51 dimm_params_t ddr_raw_timing = { variable
82 dimm_params_t ddr_raw_timing = { variable
119 dimm_params_t ddr_raw_timing = { variable
157 dimm_params_t ddr_raw_timing = { variable
197 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 20 dimm_params_t ddr_raw_timing = { variable
51 dimm_params_t ddr_raw_timing = { variable
82 dimm_params_t ddr_raw_timing = { variable
119 dimm_params_t ddr_raw_timing = { variable
157 dimm_params_t ddr_raw_timing = { variable
197 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/board/freescale/p1_p2_rdb_pc/ |
| H A D | ddr.c | 19 dimm_params_t ddr_raw_timing = { variable
50 dimm_params_t ddr_raw_timing = { variable
81 dimm_params_t ddr_raw_timing = { variable
118 dimm_params_t ddr_raw_timing = { variable
155 dimm_params_t ddr_raw_timing = { variable
195 memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); in fsl_ddr_get_dimm_params()
|