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Searched refs:deposit32 (Results 1 – 25 of 673) sorted by relevance

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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/tci/
H A Dtcg-target.c.inc264 insn = deposit32(insn, 0, 8, op);
283 insn = deposit32(insn, 0, 8, op);
292 insn = deposit32(insn, 0, 8, op);
293 insn = deposit32(insn, 8, 4, r0);
307 insn = deposit32(insn, 0, 8, op);
308 insn = deposit32(insn, 8, 4, r0);
318 insn = deposit32(insn, 0, 8, op);
319 insn = deposit32(insn, 8, 4, r0);
327 insn = deposit32(insn, 0, 8, op);
328 insn = deposit32(insn, 8, 4, r0);
[all …]
/dports/emulators/qemu/qemu-6.2.0/tcg/tci/
H A Dtcg-target.c.inc264 insn = deposit32(insn, 0, 8, op);
283 insn = deposit32(insn, 0, 8, op);
292 insn = deposit32(insn, 0, 8, op);
293 insn = deposit32(insn, 8, 4, r0);
307 insn = deposit32(insn, 0, 8, op);
308 insn = deposit32(insn, 8, 4, r0);
318 insn = deposit32(insn, 0, 8, op);
319 insn = deposit32(insn, 8, 4, r0);
327 insn = deposit32(insn, 0, 8, op);
328 insn = deposit32(insn, 8, 4, r0);
[all …]
/dports/emulators/qemu42/qemu-4.2.1/hw/misc/
H A Dgrlib_ahb_apb_pnp.c109 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
113 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
120 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
126 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
198 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
202 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
206 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
210 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
216 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu/qemu-6.2.0/hw/mips/
H A Dbootloader.c70 insn = deposit32(insn, 26, 6, opcode); in bl_gen_r_type()
71 insn = deposit32(insn, 21, 5, rs); in bl_gen_r_type()
72 insn = deposit32(insn, 16, 5, rt); in bl_gen_r_type()
73 insn = deposit32(insn, 11, 5, rd); in bl_gen_r_type()
74 insn = deposit32(insn, 6, 5, shift); in bl_gen_r_type()
75 insn = deposit32(insn, 0, 6, funct); in bl_gen_r_type()
86 insn = deposit32(insn, 26, 6, opcode); in bl_gen_i_type()
87 insn = deposit32(insn, 21, 5, rs); in bl_gen_i_type()
88 insn = deposit32(insn, 16, 5, rt); in bl_gen_i_type()
89 insn = deposit32(insn, 0, 16, imm); in bl_gen_i_type()
/dports/emulators/qemu60/qemu-6.0.0/hw/mips/
H A Dbootloader.c70 insn = deposit32(insn, 26, 6, opcode); in bl_gen_r_type()
71 insn = deposit32(insn, 21, 5, rs); in bl_gen_r_type()
72 insn = deposit32(insn, 16, 5, rt); in bl_gen_r_type()
73 insn = deposit32(insn, 11, 5, rd); in bl_gen_r_type()
74 insn = deposit32(insn, 6, 5, shift); in bl_gen_r_type()
75 insn = deposit32(insn, 0, 6, funct); in bl_gen_r_type()
86 insn = deposit32(insn, 26, 6, opcode); in bl_gen_i_type()
87 insn = deposit32(insn, 21, 5, rs); in bl_gen_i_type()
88 insn = deposit32(insn, 16, 5, rt); in bl_gen_i_type()
89 insn = deposit32(insn, 0, 16, imm); in bl_gen_i_type()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/misc/
H A Dgrlib_ahb_apb_pnp.c109 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
113 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
120 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
126 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
198 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
202 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
206 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
210 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
216 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/mips/
H A Dbootloader.c70 insn = deposit32(insn, 26, 6, opcode); in bl_gen_r_type()
71 insn = deposit32(insn, 21, 5, rs); in bl_gen_r_type()
72 insn = deposit32(insn, 16, 5, rt); in bl_gen_r_type()
73 insn = deposit32(insn, 11, 5, rd); in bl_gen_r_type()
74 insn = deposit32(insn, 6, 5, shift); in bl_gen_r_type()
75 insn = deposit32(insn, 0, 6, funct); in bl_gen_r_type()
86 insn = deposit32(insn, 26, 6, opcode); in bl_gen_i_type()
87 insn = deposit32(insn, 21, 5, rs); in bl_gen_i_type()
88 insn = deposit32(insn, 16, 5, rt); in bl_gen_i_type()
89 insn = deposit32(insn, 0, 16, imm); in bl_gen_i_type()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/misc/
H A Dgrlib_ahb_apb_pnp.c109 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
113 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
120 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
126 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
198 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
202 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
206 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
210 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
216 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/misc/
H A Dgrlib_ahb_apb_pnp.c109 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
113 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
120 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
126 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
198 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
202 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
206 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
210 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
216 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu/qemu-6.2.0/hw/misc/
H A Dgrlib_ahb_apb_pnp.c110 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
114 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
121 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
127 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
214 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
218 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
226 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
232 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
238 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu5/qemu-5.2.0/hw/misc/
H A Dgrlib_ahb_apb_pnp.c110 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
114 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
121 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
127 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
214 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
218 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
226 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
232 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
238 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu60/qemu-6.0.0/hw/misc/
H A Dgrlib_ahb_apb_pnp.c110 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
114 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
121 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
127 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_ahb_pnp_add_entry()
214 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
218 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
226 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
232 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
238 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in grlib_apb_pnp_add_entry()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/misc/
H A Dgrlib_ahb_apb_pnp.c110 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
114 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
121 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
127 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
214 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
218 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
222 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
226 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
232 dev->regs[reg_start] = deposit32(dev->regs[reg_start],
238 dev->regs[reg_start] = deposit32(dev->regs[reg_start], in Close()
/dports/emulators/qemu-utils/qemu-4.2.1/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu5/qemu-5.2.0/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/hppa/
H A Dmachine.c104 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
105 val = deposit32(val, 19, 1, ent->u); in put_tlb()
106 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
107 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
108 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
109 val = deposit32(val, 27, 1, ent->b); in put_tlb()
110 val = deposit32(val, 28, 1, ent->d); in put_tlb()
111 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu42/qemu-4.2.1/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu/qemu-6.2.0/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu60/qemu-6.0.0/target/hppa/
H A Dmachine.c103 val = deposit32(val, 1, 18, ent->access_id); in put_tlb()
104 val = deposit32(val, 19, 1, ent->u); in put_tlb()
105 val = deposit32(val, 20, 2, ent->ar_pl2); in put_tlb()
106 val = deposit32(val, 22, 2, ent->ar_pl1); in put_tlb()
107 val = deposit32(val, 24, 3, ent->ar_type); in put_tlb()
108 val = deposit32(val, 27, 1, ent->b); in put_tlb()
109 val = deposit32(val, 28, 1, ent->d); in put_tlb()
110 val = deposit32(val, 29, 1, ent->t); in put_tlb()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Dsmmuv3-internal.h199 q->cons = deposit32(q->cons, 0, q->log2size + 1, q->cons + 1); in queue_cons_incr()
445 #define EVT_SET_TYPE(x, v) ((x)->word[0] = deposit32((x)->word[0], 0 , 8 , v))
446 #define EVT_SET_SSV(x, v) ((x)->word[0] = deposit32((x)->word[0], 11, 1 , v))
447 #define EVT_SET_SSID(x, v) ((x)->word[0] = deposit32((x)->word[0], 12, 20, v))
449 #define EVT_SET_STAG(x, v) ((x)->word[2] = deposit32((x)->word[2], 0 , 16, v))
450 #define EVT_SET_STALL(x, v) ((x)->word[2] = deposit32((x)->word[2], 31, 1 , v))
451 #define EVT_SET_PNU(x, v) ((x)->word[3] = deposit32((x)->word[3], 1 , 1 , v))
452 #define EVT_SET_IND(x, v) ((x)->word[3] = deposit32((x)->word[3], 2 , 1 , v))
453 #define EVT_SET_RNW(x, v) ((x)->word[3] = deposit32((x)->word[3], 3 , 1 , v))
463 (x)->word[7] = deposit32((x)->word[7], 3, 29, addr >> 16); \
[all …]
/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Dsmmuv3-internal.h199 q->cons = deposit32(q->cons, 0, q->log2size + 1, q->cons + 1); in queue_cons_incr()
446 #define EVT_SET_TYPE(x, v) ((x)->word[0] = deposit32((x)->word[0], 0 , 8 , v))
447 #define EVT_SET_SSV(x, v) ((x)->word[0] = deposit32((x)->word[0], 11, 1 , v))
448 #define EVT_SET_SSID(x, v) ((x)->word[0] = deposit32((x)->word[0], 12, 20, v))
450 #define EVT_SET_STAG(x, v) ((x)->word[2] = deposit32((x)->word[2], 0 , 16, v))
451 #define EVT_SET_STALL(x, v) ((x)->word[2] = deposit32((x)->word[2], 31, 1 , v))
452 #define EVT_SET_PNU(x, v) ((x)->word[3] = deposit32((x)->word[3], 1 , 1 , v))
453 #define EVT_SET_IND(x, v) ((x)->word[3] = deposit32((x)->word[3], 2 , 1 , v))
454 #define EVT_SET_RNW(x, v) ((x)->word[3] = deposit32((x)->word[3], 3 , 1 , v))
455 #define EVT_SET_S2(x, v) ((x)->word[3] = deposit32((x)->word[3], 7 , 1 , v))
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Dsmmuv3-internal.h199 q->cons = deposit32(q->cons, 0, q->log2size + 1, q->cons + 1); in queue_cons_incr()
446 #define EVT_SET_TYPE(x, v) ((x)->word[0] = deposit32((x)->word[0], 0 , 8 , v))
447 #define EVT_SET_SSV(x, v) ((x)->word[0] = deposit32((x)->word[0], 11, 1 , v))
448 #define EVT_SET_SSID(x, v) ((x)->word[0] = deposit32((x)->word[0], 12, 20, v))
450 #define EVT_SET_STAG(x, v) ((x)->word[2] = deposit32((x)->word[2], 0 , 16, v))
451 #define EVT_SET_STALL(x, v) ((x)->word[2] = deposit32((x)->word[2], 31, 1 , v))
452 #define EVT_SET_PNU(x, v) ((x)->word[3] = deposit32((x)->word[3], 1 , 1 , v))
453 #define EVT_SET_IND(x, v) ((x)->word[3] = deposit32((x)->word[3], 2 , 1 , v))
454 #define EVT_SET_RNW(x, v) ((x)->word[3] = deposit32((x)->word[3], 3 , 1 , v))
455 #define EVT_SET_S2(x, v) ((x)->word[3] = deposit32((x)->word[3], 7 , 1 , v))
[all …]

12345678910>>...27