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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c408 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
502 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
806 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
807 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
848 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
881 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
905 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c408 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
502 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
806 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
807 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
848 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
881 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
905 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c408 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
502 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
806 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
807 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
848 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
881 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
905 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-exynos/
H A Dclock.c408 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
502 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
806 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
807 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
848 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
881 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
905 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-exynos/
H A Dclock.c409 div = sub_div = readl(&clk->div_fsys1); in exynos5_get_periph_rate()
503 div = readl(&clk->div_fsys1); in exynos542x_get_periph_rate()
807 ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
808 pre_ratio = readl(&clk->div_fsys1); in exynos4_get_mmc_clk()
849 addr = (unsigned int)&clk->div_fsys1; in exynos4_set_mmc_clk()
882 addr = (unsigned int)&clk->div_fsys1; in exynos5_set_mmc_clk()
906 addr = (unsigned int)&clk->div_fsys1; in exynos5420_set_mmc_clk()

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