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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/clk/altera/
H A Dclk-arria10.c38 u8 div_len; member
163 reg &= (1 << plat->div_len) - 1; in socfpga_a10_clk_get_rate()
336 plat->div_len = divreg[2]; in socfpga_a10_of_to_plat()

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