Home
last modified time | relevance | path

Searched refs:ds_add_rtn_u32 (Results 1 – 25 of 246) sorted by relevance

12345678910

/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
H A Dlocal-atomics.ll63 ; GCN: ds_add_rtn_u32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]]
77 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
91 ; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
92 ; CIVI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
110 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]]
125 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]] offset:16
139 ; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
140 ; CIVI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
H A Dlocal-atomics.ll63 ; GCN: ds_add_rtn_u32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]]
77 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
91 ; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
92 ; CIVI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
110 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]]
125 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]] offset:16
139 ; SI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
140 ; CIVI: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
H A Datomic_optimizations_local_pointer.ll19 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v[[value]]
35 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v[[value]]
47 ; GFX7LESS: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
50 ; GFX8MORE: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v[[value]]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Datomic_load_add.ll33 ; GCN: ds_add_rtn_u32
45 ; GCN: ds_add_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx10_asm_ds.s2687 ds_add_rtn_u32 v0, v1, v2 label
2690 ds_add_rtn_u32 v255, v254, v253 label
2693 ds_add_rtn_u32 v0, v254, v253 label
2696 ds_add_rtn_u32 v255, v1, v253 label
2699 ds_add_rtn_u32 v255, v254, v2 label
2702 ds_add_rtn_u32 v0, v1, v2 offset:0 label
2747 ds_add_rtn_u32 v0, v1, v2 gds label
2750 ds_add_rtn_u32 v255, v254, v253 gds label
2753 ds_add_rtn_u32 v0, v254, v253 gds label
2756 ds_add_rtn_u32 v255, v1, v253 gds label
[all …]

12345678910