/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 3047 ds_inc_rtn_u32 v0, v1, v2 label 3050 ds_inc_rtn_u32 v255, v254, v253 label 3053 ds_inc_rtn_u32 v0, v254, v253 label 3056 ds_inc_rtn_u32 v255, v1, v253 label 3059 ds_inc_rtn_u32 v255, v254, v2 label 3062 ds_inc_rtn_u32 v0, v1, v2 offset:0 label 3107 ds_inc_rtn_u32 v0, v1, v2 gds label 3110 ds_inc_rtn_u32 v255, v254, v253 gds label 3113 ds_inc_rtn_u32 v0, v254, v253 gds label 3116 ds_inc_rtn_u32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 30 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 45 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 59 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 72 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 154 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 164 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 173 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 182 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 1933 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1934 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 30 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 45 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 59 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 72 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 154 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 164 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 173 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 182 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 1933 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1934 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 30 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 45 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 59 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 72 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 156 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 166 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 175 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 184 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 1935 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1936 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 30 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 45 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 59 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 72 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 154 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 164 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 173 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 182 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 1933 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1934 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 30 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 45 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 59 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 72 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 154 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 164 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 173 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 182 ; GFX10-NEXT: ds_inc_rtn_u32 v0, v0, v1 1933 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1934 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 29 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 44 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 58 ; GFX9-NEXT: ds_inc_rtn_u32 v2, v0, v1 129 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 139 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 148 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 1489 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1490 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 1509 ; VI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1510 ; VI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 29 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 44 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 58 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 127 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 137 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 146 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 1555 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1556 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 1575 ; VI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1576 ; VI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 29 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 44 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 58 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 127 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 137 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 146 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 1555 ; CI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1556 ; CI-NEXT: ds_inc_rtn_u32 v5, v1, v0 1575 ; VI-NEXT: ds_inc_rtn_u32 v4, v1, v0 1576 ; VI-NEXT: ds_inc_rtn_u32 v5, v1, v0 [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 29 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 44 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 58 ; GFX9-NEXT: ds_inc_rtn_u32 v2, v0, v1 81 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 97 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 112 ; GFX9-NEXT: ds_inc_rtn_u32 v2, v0, v1 132 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 142 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 151 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 166 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.atomic.inc.ll | 29 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 44 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 58 ; GFX9-NEXT: ds_inc_rtn_u32 v2, v0, v1 81 ; CI-NEXT: ds_inc_rtn_u32 v2, v1, v0 97 ; VI-NEXT: ds_inc_rtn_u32 v2, v1, v0 112 ; GFX9-NEXT: ds_inc_rtn_u32 v2, v0, v1 132 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 142 ; VI-NEXT: ds_inc_rtn_u32 v0, v1, v0 151 ; GFX9-NEXT: ds_inc_rtn_u32 v0, v0, v1 166 ; CI-NEXT: ds_inc_rtn_u32 v0, v1, v0 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 143 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 423 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 424 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 143 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 423 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 424 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 143 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 423 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 424 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 140 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 421 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 422 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 140 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 421 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 422 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 143 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 427 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 428 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 37 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 143 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 423 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 424 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | llvm.amdgcn.atomic.inc.ll | 21 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 39 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] offset:16 142 ; GCN: ds_inc_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8 423 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]] 424 ; GCN: ds_inc_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[K]]
|