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Searched refs:ds_min_rtn_f32 (Results 1 – 25 of 196) sorted by relevance

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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll12 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
20 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
28 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
71 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
78 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
85 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
123 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
130 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
178 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll12 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
20 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
28 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
71 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
78 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
85 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
123 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
130 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
178 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll12 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
20 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
28 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
71 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
78 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
85 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
123 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
130 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
178 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll12 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
20 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
28 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
71 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
78 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
85 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
123 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
130 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
178 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll12 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
20 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
28 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
71 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
78 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
85 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
123 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
130 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX10-NEXT: ds_min_rtn_f32 v0, v0, v1
178 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll11 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
19 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
32 ; GFX8-NEXT: ds_min_rtn_f32 v0, v1, v0 offset:512
54 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
61 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
92 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
99 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
131 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
170 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll11 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
19 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
32 ; GFX8-NEXT: ds_min_rtn_f32 v0, v1, v0 offset:512
54 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
61 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
92 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
99 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
131 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
170 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dllvm.amdgcn.ds.fmin.ll11 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
19 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
32 ; GFX8-NEXT: ds_min_rtn_f32 v0, v1, v0 offset:512
54 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
61 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
92 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
99 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
131 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
138 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
170 ; GFX8-NEXT: ds_min_rtn_f32 v0, v0, v1
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dlds-atomic-fmin-fmax.ll39 ; SI-NEXT: ds_min_rtn_f32 v1, v1, v0
45 ; SI-NEXT: ds_min_rtn_f32 v0, v0, v1
72 ; GFX7-NEXT: ds_min_rtn_f32 v0, v0, v1
99 ; VI-NEXT: ds_min_rtn_f32 v0, v0, v1
125 ; GFX9-NEXT: ds_min_rtn_f32 v0, v0, v1
175 ; G_SI-NEXT: ds_min_rtn_f32 v1, v1, v0
178 ; G_SI-NEXT: ds_min_rtn_f32 v0, v2, v0
181 ; G_SI-NEXT: ds_min_rtn_f32 v0, v0, v1
231 ; G_VI-NEXT: ds_min_rtn_f32 v1, v1, v0
234 ; G_VI-NEXT: ds_min_rtn_f32 v0, v2, v0
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A Dlds_atomic_f32.ll33 ; GCN: ds_min_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
36 ; GCN: ds_min_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/
H A Dgfx7_asm_ds.s1047 ds_min_rtn_f32 v5, v1, v2 offset:65535 label
1050 ds_min_rtn_f32 v255, v1, v2 offset:65535 label
1053 ds_min_rtn_f32 v5, v255, v2 offset:65535 label
1056 ds_min_rtn_f32 v5, v1, v255 offset:65535 label
1059 ds_min_rtn_f32 v5, v1, v2 label
1062 ds_min_rtn_f32 v5, v1, v2 offset:0 label
1065 ds_min_rtn_f32 v5, v1, v2 offset:4 label
1068 ds_min_rtn_f32 v5, v1, v2 offset:65535 gds label
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/
H A Dgfx7_asm_ds.s1047 ds_min_rtn_f32 v5, v1, v2 offset:65535 label
1050 ds_min_rtn_f32 v255, v1, v2 offset:65535 label
1053 ds_min_rtn_f32 v5, v255, v2 offset:65535 label
1056 ds_min_rtn_f32 v5, v1, v255 offset:65535 label
1059 ds_min_rtn_f32 v5, v1, v2 label
1062 ds_min_rtn_f32 v5, v1, v2 offset:0 label
1065 ds_min_rtn_f32 v5, v1, v2 offset:4 label
1068 ds_min_rtn_f32 v5, v1, v2 offset:65535 gds label

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