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Searched refs:ds_read_b32 (Results 1 – 25 of 857) sorted by relevance

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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
H A Dbug-sdag-scheduler-cycle.ll7 ; CHECK: ds_read_b32
8 ; CHECK: ds_read_b32
9 ; CHECK: ds_read_b32
10 ; CHECK: ds_read_b32
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Dload-local-redundant-copies.ll14 ; CHECK-NEXT: ds_read_b32 v2, v1
15 ; CHECK-NEXT: ds_read_b32 v1, v4
16 ; CHECK-NEXT: ds_read_b32 v3, v3
17 ; CHECK-NEXT: ds_read_b32 v0, v0
41 ; CHECK-NEXT: ds_read_b32 v4, v2
42 ; CHECK-NEXT: ds_read_b32 v3, v3
43 ; CHECK-NEXT: ds_read_b32 v2, v6
44 ; CHECK-NEXT: ds_read_b32 v9, v7
45 ; CHECK-NEXT: ds_read_b32 v8, v8
47 ; CHECK-NEXT: ds_read_b32 v6, v1
[all …]
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
H A Dbug-sdag-scheduler-cycle.ll7 ; CHECK: ds_read_b32
8 ; CHECK: ds_read_b32
9 ; CHECK: ds_read_b32
10 ; CHECK: ds_read_b32
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/
H A Dpacked-op-sel.ll4 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
5 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
32 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
33 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
61 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
62 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
90 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
91 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
120 ; GCN: ds_read_b32 [[VEC0:v[0-9]+]]
121 ; GCN: ds_read_b32 [[VEC1:v[0-9]+]]
[all …]

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