/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AMDGPU/ |
H A D | gfx10_asm_ds.s | 1616 ds_write2st64_b32 v0, v1, v2 label 1619 ds_write2st64_b32 v255, v254, v253 label 1622 ds_write2st64_b32 v0, v254, v253 label 1625 ds_write2st64_b32 v255, v1, v253 label 1628 ds_write2st64_b32 v255, v254, v2 label 1631 ds_write2st64_b32 v0, v1, v2 offset0:0 offset1:123 label 1736 ds_write2st64_b32 v0, v1, v2 gds label 1739 ds_write2st64_b32 v255, v254, v253 gds label 1742 ds_write2st64_b32 v0, v254, v253 gds label 1745 ds_write2st64_b32 v255, v1, v253 gds label [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
H A D | lower-lds-struct-aa.ll | 10 ; GCN: ds_write2st64_b32 33 ; GCN-DAG: ds_write2st64_b32
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H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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H A D | ds-combine-large-stride.ll | 323 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 324 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:64 offset1:96 325 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:128 offset1:160 326 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:192 offset1:224 359 ; GCN-DAG: ds_write2st64_b32 [[B1]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 360 ; GCN-DAG: ds_write2st64_b32 [[B2]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 361 ; GCN-DAG: ds_write2st64_b32 [[B3]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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H A D | ds-combine-large-stride.ll | 323 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 324 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:64 offset1:96 325 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:128 offset1:160 326 ; GCN-DAG: ds_write2st64_b32 [[BASE]], v{{[0-9]+}}, v{{[0-9]+}} offset0:192 offset1:224 359 ; GCN-DAG: ds_write2st64_b32 [[B1]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 360 ; GCN-DAG: ds_write2st64_b32 [[B2]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32 361 ; GCN-DAG: ds_write2st64_b32 [[B3]], v{{[0-9]+}}, v{{[0-9]+}} offset1:32
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
H A D | ds_write2st64.ll | 12 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL]], [[VAL]] offset1:1 38 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset0:2 offset1:5 67 ; GCN: ds_write2st64_b32 [[VPTR]], [[VAL0]], [[VAL1]] offset1:255
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