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/dports/sysutils/modules/modules-4.6.0/testsuite/bin/
H A Dinstall_test_cmake53 list(GET cmdelt 0 elt0)
64 list(GET cmdelt 0 elt0)
74 list(GET cmdelt 0 elt0)
78 module("${elt0}" "${elt1}" "${elt2}")
80 ml("${elt0}" "${elt1}" "${elt2}")
83 list(GET cmdelt 0 elt0)
86 module("${elt0}" "${elt1}")
88 ml("${elt0}" "${elt1}")
91 list(GET cmdelt 0 elt0)
93 module("${elt0}")
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/Transforms/InstCombine/AMDGPU/
H A Damdgcn-demanded-vector-elts.ll45 ret float %elt0
64 ret float %elt0
179 ret float %elt0
227 ret float %elt0
254 ret float %elt0
329 ret float %elt0
338 ret float %elt0
348 ret float %elt0
356 ret float %elt0
365 ret float %elt0
[all …]
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc8/gcc-8.5.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc10/gcc-10.3.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc48/gcc-4.8.5/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/testsuite/gcc.target/sparc/
H A Dvec-init-2.inc23 #define V2HI_TEST(N, elt0, elt1) \
27 __v2hi v = { (elt0), (elt1) }; \
28 compare32(N, &v, ((int)(elt0) << 16) | (elt1)); \
42 #define V4HI_TEST(N, elt0, elt1, elt2, elt3) \
46 __v4hi v = { (elt0), (elt1), (elt2), (elt3) }; \
48 ((long long)(elt0) << 48) | \
/dports/devel/llvm90/llvm-9.0.1.src/test/Transforms/InstCombine/AMDGPU/
H A Damdgcn-demanded-vector-elts.ll45 ret float %elt0
64 ret float %elt0
178 ret float %elt0
226 ret float %elt0
253 ret float %elt0
359 ret float %elt0
378 ret float %elt0
475 ret float %elt0
545 ret float %elt0
598 ret float %elt0
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/Transforms/InstCombine/AMDGPU/
H A Damdgcn-demanded-vector-elts.ll45 ret float %elt0
64 ret float %elt0
179 ret float %elt0
227 ret float %elt0
254 ret float %elt0
360 ret float %elt0
379 ret float %elt0
477 ret float %elt0
547 ret float %elt0
600 ret float %elt0
[all …]

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