/dports/lang/gnat_util/gcc-6-20180516/gcc/config/aarch64/ |
H A D | aarch64.c | 10778 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 10781 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 10782 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/aarch64/ |
H A D | aarch64.c | 10778 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 10781 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 10782 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13590 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13593 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13594 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13590 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13593 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13594 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13590 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13593 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13594 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13590 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13593 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13594 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13590 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13593 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13594 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc8/gcc-8.5.0/gcc/config/aarch64/ |
H A D | aarch64.c | 13750 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 13753 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 13754 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc9/gcc-9.4.0/gcc/config/aarch64/ |
H A D | aarch64.c | 15096 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 15099 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 15100 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/aarch64/ |
H A D | aarch64.c | 14786 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 14789 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 14790 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/aarch64/ |
H A D | aarch64.c | 15096 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 15099 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 15100 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 17951 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 17954 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 17955 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/aarch64/ |
H A D | aarch64.c | 18419 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 18422 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 18423 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc10/gcc-10.3.0/gcc/config/aarch64/ |
H A D | aarch64.c | 18361 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 18364 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 18365 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 20082 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 20085 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 20086 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc11/gcc-11.2.0/gcc/config/aarch64/ |
H A D | aarch64.c | 20082 rtx elt_op = XVECEXP (op, 0, i); 20085 if (!CONST_INT_P (elt_op) 20086 || INTVAL (elt_ideal) != INTVAL (elt_op))
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/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/aarch64/ |
H A D | aarch64.c | 20351 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 20354 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 20355 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/aarch64/ |
H A D | aarch64.c | 20515 rtx elt_op = XVECEXP (op, 0, i); in aarch64_simd_check_vect_par_cnst_half() local 20518 if (!CONST_INT_P (elt_op) in aarch64_simd_check_vect_par_cnst_half() 20519 || INTVAL (elt_ideal) != INTVAL (elt_op)) in aarch64_simd_check_vect_par_cnst_half()
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/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
H A D | arm.c | 31304 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31307 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31308 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/lang/gcc9/gcc-9.4.0/gcc/config/arm/ |
H A D | arm.c | 31478 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31481 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31482 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/arm/ |
H A D | arm.c | 31246 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31249 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31250 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
H A D | arm.c | 31304 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31307 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31308 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/arm/ |
H A D | arm.c | 31304 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31307 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31308 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/arm/ |
H A D | arm.c | 31304 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31307 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31308 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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/dports/lang/gcc8/gcc-8.5.0/gcc/config/arm/ |
H A D | arm.c | 31310 rtx elt_op = XVECEXP (op, 0, i); in arm_simd_check_vect_par_cnst_half_p() local 31313 if (!CONST_INT_P (elt_op) in arm_simd_check_vect_par_cnst_half_p() 31314 || INTVAL (elt_ideal) != INTVAL (elt_op)) in arm_simd_check_vect_par_cnst_half_p()
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