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Searched refs:f_elements (Results 1 – 25 of 70) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/cpu/armv7/omap5/
H A Ddra7xx_iodelay.c114 u32 c_elements, f_elements; in get_cfg_reg() local
124 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
126 if (f_elements > 22) { in get_cfg_reg()
127 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
130 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
134 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c113 u32 c_elements, f_elements; in get_cfg_reg() local
123 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
125 if (f_elements > 22) { in get_cfg_reg()
126 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
129 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
133 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c113 u32 c_elements, f_elements; in get_cfg_reg() local
123 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
125 if (f_elements > 22) { in get_cfg_reg()
126 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
129 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
133 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c113 u32 c_elements, f_elements; in get_cfg_reg() local
123 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
125 if (f_elements > 22) { in get_cfg_reg()
126 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
129 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
133 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c113 u32 c_elements, f_elements; in get_cfg_reg() local
123 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
125 if (f_elements > 22) { in get_cfg_reg()
126 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
129 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
133 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c115 u32 c_elements, f_elements; in get_cfg_reg() local
125 f_elements = (g_delay_fine + a_delay_fine) / 10; in get_cfg_reg()
127 if (f_elements > 22) { in get_cfg_reg()
128 total_delay = c_elements * cpde + f_elements * fpde; in get_cfg_reg()
131 f_elements = (total_delay % cpde) / fpde; in get_cfg_reg()
135 reg |= (f_elements << CFG_X_FINE_DLY_SHIFT) & CFG_X_FINE_DLY_MASK; in get_cfg_reg()

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