Home
last modified time | relevance | path

Searched refs:fclk_divisors (Results 1 – 25 of 73) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c58 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
63 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c58 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
63 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c58 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
63 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c58 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
63 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c58 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
63 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c43 const uint8_t fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 }; in get_FCLK() local
48 fclk_divisors[(clkset1 >> SYSCON_CLKSET1_FCLK_DIV_SHIFT) & 7]; in get_FCLK()

123