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Searched refs:g_ctl (Results 1 – 25 of 143) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/media/dvb-frontends/
H A Dhorus3a.c175 u8 g_ctl = 0; in horus3a_set_params() local
205 g_ctl = 0x01; in horus3a_set_params()
209 g_ctl = 0x02; in horus3a_set_params()
213 g_ctl = 0x02; in horus3a_set_params()
217 g_ctl = 0x03; in horus3a_set_params()
221 g_ctl = 0x04; in horus3a_set_params()
225 g_ctl = 0x04; in horus3a_set_params()
229 g_ctl = 0x05; in horus3a_set_params()
233 g_ctl = 0x02; in horus3a_set_params()
237 g_ctl = 0x01; in horus3a_set_params()
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/media/dvb-frontends/
H A Dhorus3a.c175 u8 g_ctl = 0; in horus3a_set_params() local
205 g_ctl = 0x01; in horus3a_set_params()
209 g_ctl = 0x02; in horus3a_set_params()
213 g_ctl = 0x02; in horus3a_set_params()
217 g_ctl = 0x03; in horus3a_set_params()
221 g_ctl = 0x04; in horus3a_set_params()
225 g_ctl = 0x04; in horus3a_set_params()
229 g_ctl = 0x05; in horus3a_set_params()
233 g_ctl = 0x02; in horus3a_set_params()
237 g_ctl = 0x01; in horus3a_set_params()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/media/dvb-frontends/
H A Dhorus3a.c175 u8 g_ctl = 0; in horus3a_set_params() local
205 g_ctl = 0x01; in horus3a_set_params()
209 g_ctl = 0x02; in horus3a_set_params()
213 g_ctl = 0x02; in horus3a_set_params()
217 g_ctl = 0x03; in horus3a_set_params()
221 g_ctl = 0x04; in horus3a_set_params()
225 g_ctl = 0x04; in horus3a_set_params()
229 g_ctl = 0x05; in horus3a_set_params()
233 g_ctl = 0x02; in horus3a_set_params()
237 g_ctl = 0x01; in horus3a_set_params()
[all …]
/dports/sysutils/u-boot-utilite/u-boot-2015.07/drivers/usb/host/
H A Dxhci-omap.c39 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
47 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
52 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
72 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
92 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/usb/host/
H A Dxhci-dwc3.c29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
62 clrbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
82 reg = readl(&dwc3_reg->g_ctl); in dwc3_core_init()
102 writel(reg, &dwc3_reg->g_ctl); in dwc3_core_init()

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