/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); 119 setbits_le32(&psrc->gpr10, persist_sec); 122 reg = readl(&psrc->gpr10); 127 writel(reg, &psrc->gpr10); 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE)
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/dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/arch/arm/mach-imx/ |
H A D | init.c | 117 clrbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 119 setbits_le32(&psrc->gpr10, persist_sec); in boot_mode_apply() 122 reg = readl(&psrc->gpr10); in boot_mode_apply() 127 writel(reg, &psrc->gpr10); in boot_mode_apply() 135 if (readl(&src_base->gpr10) & IMX6_SRC_GPR10_BMODE) in imx6_src_get_boot_mode()
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